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Emilgardisburrbull
authored andcommitted
add some documentation.
also some minor touchups
1 parent 592b9f0 commit 438950a

25 files changed

+274
-22
lines changed

svd-parser/src/registerproperties.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ impl Parse for RegisterProperties {
77
type Config = Config;
88

99
fn parse(tree: &Node, config: &Self::Config) -> Result<Self, Self::Error> {
10-
RegisterProperties::builder()
10+
RegisterProperties::new()
1111
.size(optional::<u32>("size", tree, &())?)
1212
.access(optional::<Access>("access", tree, config)?)
1313
.reset_value(optional::<u64>("resetValue", tree, &())?)

svd-rs/src/access.rs

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ impl Default for Access {
4646
}
4747

4848
impl Access {
49+
/// Parse a string into an [Access] value, returning [`Option::None`] if the string is not valid.
4950
pub fn parse_str(s: &str) -> Option<Self> {
5051
match s {
5152
"read-only" => Some(Self::ReadOnly),
@@ -57,6 +58,7 @@ impl Access {
5758
}
5859
}
5960

61+
/// Convert this [`Access`] into a static string.
6062
pub const fn as_str(self) -> &'static str {
6163
match self {
6264
Self::ReadOnly => "read-only",

svd-rs/src/addressblock.rs

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,17 +1,25 @@
1+
/// An uniquely mapped address block to a peripheral
12
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
23
#[derive(Clone, Debug, PartialEq)]
34
pub struct AddressBlock {
5+
/// Specifies the start address of an address block relative to the peripheral [`baseAddress`](crate::Peripheral::base_address).
46
pub offset: u32,
7+
/// Specifies the number of [`addressUnitBits`](crate::Device::address_unit_bits) being covered by this address block.
58
pub size: u32,
9+
/// Usage of the address block.
610
pub usage: AddressBlockUsage,
711
}
812

13+
/// Usage of the address block.
914
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
1015
#[cfg_attr(feature = "serde", serde(rename_all = "kebab-case"))]
1116
#[derive(Clone, Copy, Debug, Eq, PartialEq)]
1217
pub enum AddressBlockUsage {
18+
/// Registers
1319
Registers,
20+
/// Buffer / Memory
1421
Buffer,
22+
/// Reserved
1523
Reserved,
1624
}
1725

@@ -22,6 +30,7 @@ impl Default for AddressBlockUsage {
2230
}
2331

2432
impl AddressBlockUsage {
33+
/// Parse a string into an [AddressBlockUsage] value, returning [`Option::None`] if the string is not valid.
2534
pub fn parse_str(s: &str) -> Option<Self> {
2635
match s {
2736
"registers" => Some(Self::Registers),
@@ -31,6 +40,7 @@ impl AddressBlockUsage {
3140
}
3241
}
3342

43+
/// Convert this [`AddressBlockUsage`] into a static string.
3444
pub const fn as_str(self) -> &'static str {
3545
match self {
3646
Self::Registers => "registers",

svd-rs/src/bitrange.rs

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,12 @@
1+
/// Errors for bit ranges
12
#[derive(Clone, Debug, PartialEq, Eq, thiserror::Error)]
23
pub enum Error {
4+
/// The bit range is 0 bits wide
35
#[error("bitRange width of 0 does not make sense")]
46
ZeroWidth,
57
}
68

9+
/// A bit range, describing the [least significant bit](Self::lsb) and [most significant bit](Self::msb)
710
#[derive(Clone, Copy, Debug, PartialEq)]
811
pub struct BitRange {
912
/// Value defining the position of the least significant bit of the field within the register
@@ -12,40 +15,52 @@ pub struct BitRange {
1215
/// Value defining the bit-width of the bitfield within the register
1316
pub width: u32,
1417

18+
/// The underlying description of the bit range
1519
pub range_type: BitRangeType,
1620
}
1721

22+
/// The style of bit range that describes a [BitRange]
1823
#[derive(Clone, Copy, Debug, PartialEq)]
1924
pub enum BitRangeType {
25+
/// A bit range in the format: `[<msb>:<lsb>]`
2026
BitRange,
27+
/// A bit range described as offset and width
2128
OffsetWidth,
29+
/// A bit range described as lsb and msb as separate elements
2230
MsbLsb,
2331
}
2432

2533
impl BitRange {
34+
/// Get the position of the least significant bit
2635
pub fn lsb(&self) -> u32 {
2736
self.offset
2837
}
38+
/// Get the position of the most significant bit
2939
pub fn msb(&self) -> u32 {
3040
self.offset + self.width - 1
3141
}
42+
/// Get the bit range in the format `[<msb>:<lsb>]`
3243
pub fn bit_range(&self) -> String {
3344
format!("[{}:{}]", self.msb(), self.lsb())
3445
}
46+
/// Construct a [`BitRange`] from a offset and width
3547
pub fn from_offset_width(offset: u32, width: u32) -> Self {
3648
Self {
3749
offset,
3850
width,
3951
range_type: BitRangeType::OffsetWidth,
4052
}
4153
}
54+
55+
/// Construct a [`BitRange`] from a msb and lsb
4256
pub fn from_msb_lsb(msb: u32, lsb: u32) -> Self {
4357
Self {
4458
offset: lsb,
4559
width: msb - lsb + 1,
4660
range_type: BitRangeType::MsbLsb,
4761
}
4862
}
63+
/// Construct a [`BitRange`] from string in the format `[<msb>:<lsb>]`
4964
pub fn from_bit_range(text: &str) -> Option<Self> {
5065
if !text.starts_with('[') || !text.ends_with(']') {
5166
return None;

svd-rs/src/cluster.rs

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2,9 +2,12 @@ use core::ops::{Deref, DerefMut};
22

33
use super::{ClusterInfo, DimElement};
44

5+
/// Cluster describes a sequence of neighboring registers within a peripheral.
56
#[derive(Clone, Debug, PartialEq)]
67
pub enum Cluster {
8+
/// A single cluster, without any dimension.
79
Single(ClusterInfo),
10+
/// A cluster array
811
Array(ClusterInfo, DimElement),
912
}
1013

svd-rs/src/clusterinfo.rs

Lines changed: 18 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,12 +3,15 @@ use super::{
33
BuildError, EmptyToNone, RegisterCluster, RegisterProperties, SvdError, ValidateLevel,
44
};
55

6+
/// Errors from [`ClusterInfo::validate`]
67
#[derive(Clone, Debug, PartialEq, Eq, thiserror::Error)]
78
pub enum Error {
9+
/// The cluster is can not be empty
810
#[error("Cluster must contain at least one Register or Cluster")]
911
EmptyCluster,
1012
}
1113

14+
/// Description of a cluster
1215
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
1316
#[cfg_attr(feature = "serde", serde(rename_all = "camelCase"))]
1417
#[derive(Clone, Debug, PartialEq)]
@@ -40,6 +43,7 @@ pub struct ClusterInfo {
4043
#[cfg_attr(feature = "serde", serde(flatten))]
4144
pub default_register_properties: RegisterProperties,
4245

46+
/// Children/members of the cluster
4347
pub children: Vec<RegisterCluster>,
4448

4549
/// Specify the cluster name from which to inherit data.
@@ -51,6 +55,7 @@ pub struct ClusterInfo {
5155
pub derived_from: Option<String>,
5256
}
5357

58+
/// Builder for [`ClusterInfo`]
5459
#[derive(Clone, Debug, Default, PartialEq)]
5560
pub struct ClusterInfoBuilder {
5661
name: Option<String>,
@@ -77,34 +82,42 @@ impl From<ClusterInfo> for ClusterInfoBuilder {
7782
}
7883

7984
impl ClusterInfoBuilder {
85+
/// Set the name of the cluster.
8086
pub fn name(mut self, value: String) -> Self {
8187
self.name = Some(value);
8288
self
8389
}
90+
/// Set the description of the cluster.
8491
pub fn description(mut self, value: Option<String>) -> Self {
8592
self.description = value;
8693
self
8794
}
95+
/// Set the struct type name of the cluster. If not specified, the name of the cluster should be used.
8896
pub fn header_struct_name(mut self, value: Option<String>) -> Self {
8997
self.header_struct_name = value;
9098
self
9199
}
100+
/// Set the address_offset of the cluster, relative to the [`baseAddress`](crate::Peripheral::base_address) of the peripheral.
92101
pub fn address_offset(mut self, value: u32) -> Self {
93102
self.address_offset = Some(value);
94103
self
95104
}
105+
/// Set the default_register_properties of the cluster.
96106
pub fn default_register_properties(mut self, value: RegisterProperties) -> Self {
97107
self.default_register_properties = value;
98108
self
99109
}
110+
/// Set the children of the cluster.
100111
pub fn children(mut self, value: Vec<RegisterCluster>) -> Self {
101112
self.children = Some(value);
102113
self
103114
}
115+
/// Set the derived_from of the cluster.
104116
pub fn derived_from(mut self, value: Option<String>) -> Self {
105117
self.derived_from = value;
106118
self
107119
}
120+
/// Validate and build a [`ClusterInfo`].
108121
pub fn build(self, lvl: ValidateLevel) -> Result<ClusterInfo, SvdError> {
109122
let mut cluster = ClusterInfo {
110123
name: self
@@ -129,10 +142,12 @@ impl ClusterInfoBuilder {
129142
}
130143

131144
impl ClusterInfo {
145+
/// Make a builder for [`ClusterInfo`]
132146
pub fn builder() -> ClusterInfoBuilder {
133147
ClusterInfoBuilder::default()
134148
}
135149

150+
/// Modify an existing [`ClusterInfo`] based on a [builder](ClusterInfoBuilder).
136151
pub fn modify_from(
137152
&mut self,
138153
builder: ClusterInfoBuilder,
@@ -168,6 +183,7 @@ impl ClusterInfo {
168183
}
169184
}
170185

186+
/// Validate the [`ClusterInfo`]
171187
pub fn validate(&mut self, lvl: ValidateLevel) -> Result<(), SvdError> {
172188
if lvl.is_strict() {
173189
super::check_dimable_name(&self.name, "name")?;
@@ -184,7 +200,7 @@ impl ClusterInfo {
184200
}
185201

186202
impl ClusterInfo {
187-
/// returns iterator over all registers cluster contains
203+
/// returns a iterator over all registers the cluster contains
188204
pub fn reg_iter(&self) -> RegIter {
189205
let mut rem: Vec<&RegisterCluster> = Vec::with_capacity(self.children.len());
190206
for r in self.children.iter().rev() {
@@ -193,7 +209,7 @@ impl ClusterInfo {
193209
RegIter { rem }
194210
}
195211

196-
/// returns mutable iterator over all registers cluster contains
212+
/// returns a mutable iterator over all registers cluster contains
197213
pub fn reg_iter_mut(&mut self) -> RegIterMut {
198214
let mut rem: Vec<&mut RegisterCluster> = Vec::with_capacity(self.children.len());
199215
for r in self.children.iter_mut().rev() {

svd-rs/src/cpu.rs

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,10 +1,11 @@
11
use super::{BuildError, Endian, SvdError, ValidateLevel};
2-
2+
/// CPU describes the processor included in the microcontroller device.
33
#[cfg_attr(feature = "serde", derive(serde::Deserialize, serde::Serialize))]
44
#[cfg_attr(feature = "serde", serde(rename_all = "camelCase"))]
55
#[derive(Clone, Debug, PartialEq)]
66
#[non_exhaustive]
77
pub struct Cpu {
8+
/// Processor architecture
89
pub name: String,
910

1011
/// Define the HW revision of the processor
@@ -26,6 +27,7 @@ pub struct Cpu {
2627
pub has_vendor_systick: bool,
2728
}
2829

30+
/// Builder for [`Cpu`]
2931
#[derive(Clone, Debug, Default, PartialEq)]
3032
pub struct CpuBuilder {
3133
name: Option<String>,
@@ -52,34 +54,42 @@ impl From<Cpu> for CpuBuilder {
5254
}
5355

5456
impl CpuBuilder {
57+
/// Set the name of the cpu.
5558
pub fn name(mut self, value: String) -> Self {
5659
self.name = Some(value);
5760
self
5861
}
62+
/// Set the revision of the cpu.
5963
pub fn revision(mut self, value: String) -> Self {
6064
self.revision = Some(value);
6165
self
6266
}
67+
/// Set the endian of the cpu.
6368
pub fn endian(mut self, value: Endian) -> Self {
6469
self.endian = Some(value);
6570
self
6671
}
72+
/// Set the mpu_present of the cpu.
6773
pub fn mpu_present(mut self, value: bool) -> Self {
6874
self.mpu_present = Some(value);
6975
self
7076
}
77+
/// Set the fpu_present of the cpu.
7178
pub fn fpu_present(mut self, value: bool) -> Self {
7279
self.fpu_present = Some(value);
7380
self
7481
}
82+
/// Set the nvic_priority_bits of the cpu.
7583
pub fn nvic_priority_bits(mut self, value: u32) -> Self {
7684
self.nvic_priority_bits = Some(value);
7785
self
7886
}
87+
/// Set the has_vendor_systick of the cpu.
7988
pub fn has_vendor_systick(mut self, value: bool) -> Self {
8089
self.has_vendor_systick = Some(value);
8190
self
8291
}
92+
/// Validate and build a [`Cpu`].
8393
pub fn build(self, lvl: ValidateLevel) -> Result<Cpu, SvdError> {
8494
let mut cpu = Cpu {
8595
name: self
@@ -112,9 +122,11 @@ impl CpuBuilder {
112122
}
113123

114124
impl Cpu {
125+
/// Make a builder for [`Cpu`]
115126
pub fn builder() -> CpuBuilder {
116127
CpuBuilder::default()
117128
}
129+
/// Modify an existing [`Cpu`] based on a [builder](CpuBuilder).
118130
pub fn modify_from(&mut self, builder: CpuBuilder, lvl: ValidateLevel) -> Result<(), SvdError> {
119131
if let Some(name) = builder.name {
120132
self.name = name;
@@ -143,10 +155,12 @@ impl Cpu {
143155
Ok(())
144156
}
145157
}
158+
/// Validate the [`Cpu`]
146159
pub fn validate(&mut self, _lvl: ValidateLevel) -> Result<(), SvdError> {
147160
// TODO
148161
Ok(())
149162
}
163+
/// Check if the [`Cpu`] is a Cortex-M
150164
pub fn is_cortex_m(&self) -> bool {
151165
self.name.starts_with("CM")
152166
}

svd-rs/src/derive_from.rs

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
//! Implementations of DeriveFrom, setting non-explicit fields.
12
use crate::{
23
ClusterInfo, EnumeratedValues, FieldInfo, Peripheral, RegisterInfo, RegisterProperties,
34
};

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