Merge #171

171: add missing entries to Cpu r=Emilgardis a=burrbull

except `sauRegionsConfig`

Co-authored-by: Andrey Zgarbul <[email protected]>

Author: bors[bot]

svd-encoder/src/cpu.rs

@@ -5,18 +5,50 @@ impl Encode for Cpu {
     type Error = EncodeError;
 
     fn encode(&self) -> Result<Element, EncodeError> {
-        let children = vec![
+        let mut children = vec![
             new_node("name", self.name.clone()),
             new_node("revision", self.revision.clone()),
             self.endian.encode_node()?,
             new_node("mpuPresent", format!("{}", self.mpu_present)),
             new_node("fpuPresent", format!("{}", self.fpu_present)),
-            new_node("nvicPrioBits", format!("{}", self.nvic_priority_bits)),
-            new_node(
-                "vendorSystickConfig",
-                format!("{}", self.has_vendor_systick),
-            ),
         ];
+        if let Some(v) = &self.fpu_double_precision {
+            children.push(new_node("fpuDP", format!("{}", v)));
+        }
+        if let Some(v) = &self.dsp_present {
+            children.push(new_node("dspPresent", format!("{}", v)));
+        }
+        if let Some(v) = &self.icache_present {
+            children.push(new_node("icachePresent", format!("{}", v)));
+        }
+        if let Some(v) = &self.dcache_present {
+            children.push(new_node("dcachePresent", format!("{}", v)));
+        }
+        if let Some(v) = &self.itcm_present {
+            children.push(new_node("itcmPresent", format!("{}", v)));
+        }
+        if let Some(v) = &self.dtcm_present {
+            children.push(new_node("dtcmPresent", format!("{}", v)));
+        }
+        if let Some(v) = &self.vtor_present {
+            children.push(new_node("vtorPresent", format!("{}", v)));
+        }
+        children.push(new_node(
+            "nvicPrioBits",
+            format!("{}", self.nvic_priority_bits),
+        ));
+        children.push(new_node(
+            "vendorSystickConfig",
+            format!("{}", self.has_vendor_systick),
+        ));
+
+        if let Some(v) = &self.device_num_interrupts {
+            children.push(new_node("deviceNumInterrupts", format!("{}", v)));
+        }
+        if let Some(v) = &self.sau_num_regions {
+            children.push(new_node("sauNumRegions", format!("{}", v)));
+        }
+
         let mut elem = Element::new("cpu");
         elem.children = children;
         Ok(elem)

svd-parser/src/cpu.rs

@@ -1,5 +1,6 @@
 use super::*;
 use crate::svd::{Cpu, Endian};
+use crate::types::BoolParse;
 
 impl Parse for Cpu {
     type Object = Self;
@@ -17,8 +18,17 @@ impl Parse for Cpu {
             .endian(Endian::parse(&tree.get_child_elem("endian")?, config)?)
             .mpu_present(tree.get_child_bool("mpuPresent")?)
             .fpu_present(tree.get_child_bool("fpuPresent")?)
+            .fpu_double_precision(optional::<BoolParse>("fpuDP", tree, &())?)
+            .dsp_present(optional::<BoolParse>("dspPresent", tree, &())?)
+            .icache_present(optional::<BoolParse>("icachePresent", tree, &())?)
+            .dcache_present(optional::<BoolParse>("dcachePresent", tree, &())?)
+            .itcm_present(optional::<BoolParse>("itcmPresent", tree, &())?)
+            .dtcm_present(optional::<BoolParse>("dtcmPresent", tree, &())?)
+            .vtor_present(optional::<BoolParse>("vtorPresent", tree, &())?)
             .nvic_priority_bits(tree.get_child_u32("nvicPrioBits")?)
             .has_vendor_systick(tree.get_child_bool("vendorSystickConfig")?)
+            .device_num_interrupts(optional::<u32>("deviceNumInterrupts", tree, &())?)
+            .sau_num_regions(optional::<u32>("sauNumRegions", tree, &())?)
             .build(config.validate_level)
             .map_err(|e| SVDError::from(e).at(tree.id()))
     }

svd-rs/CHANGELOG.md

@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## Unreleased
 
+- Add optional entries to `Cpu`
 - `AddressBlock` now uses builder
 - Add `dim_name` and `dim_array_index` to `DimElement`
 - Add `alternate_peripheral`, `prepend_to_name`, `append_to_name`,

svd-rs/src/cpu.rs

@@ -23,11 +23,44 @@ pub struct Cpu {
     /// Indicate whether the processor is equipped with a hardware floating point unit (FPU)
     pub fpu_present: bool,
 
+    /// Indicate whether the processor is equipped with a double precision floating point unit.
+    /// This element is valid only when `fpu_present` is set to `true`
+    #[cfg_attr(feature = "serde", serde(rename = "fpuDP"))]
+    pub fpu_double_precision: Option<bool>,
+
+    /// Indicates whether the processor implements the optional SIMD DSP extensions (DSP)
+    pub dsp_present: Option<bool>,
+
+    /// Indicate whether the processor has an instruction cache
+    pub icache_present: Option<bool>,
+
+    /// Indicate whether the processor has a data cache
+    pub dcache_present: Option<bool>,
+
+    /// Indicate whether the processor has an instruction tightly coupled memory
+    pub itcm_present: Option<bool>,
+
+    /// Indicate whether the processor has a data tightly coupled memory
+    pub dtcm_present: Option<bool>,
+
+    /// Indicate whether the Vector Table Offset Register (VTOR) is implemented.
+    /// If not specified, then VTOR is assumed to be present
+    pub vtor_present: Option<bool>,
+
     /// Define the number of bits available in the Nested Vectored Interrupt Controller (NVIC) for configuring priority
+    #[cfg_attr(feature = "serde", serde(rename = "nvicPrioBits"))]
     pub nvic_priority_bits: u32,
 
     /// Indicate whether the processor implements a vendor-specific System Tick Timer
+    #[cfg_attr(feature = "serde", serde(rename = "vendorSystickConfig"))]
     pub has_vendor_systick: bool,
+
+    /// Add 1 to the highest interrupt number and specify this number in here
+    pub device_num_interrupts: Option<u32>,
+
+    /// Indicate the amount of regions in the Security Attribution Unit (SAU)
+    pub sau_num_regions: Option<u32>,
+    // sauRegionsConfig
 }
 
 /// Builder for [`Cpu`]
@@ -38,8 +71,17 @@ pub struct CpuBuilder {
     endian: Option<Endian>,
     mpu_present: Option<bool>,
     fpu_present: Option<bool>,
+    fpu_double_precision: Option<bool>,
+    dsp_present: Option<bool>,
+    icache_present: Option<bool>,
+    dcache_present: Option<bool>,
+    itcm_present: Option<bool>,
+    dtcm_present: Option<bool>,
+    vtor_present: Option<bool>,
     nvic_priority_bits: Option<u32>,
     has_vendor_systick: Option<bool>,
+    device_num_interrupts: Option<u32>,
+    sau_num_regions: Option<u32>,
 }
 
 impl From<Cpu> for CpuBuilder {
@@ -50,8 +92,17 @@ impl From<Cpu> for CpuBuilder {
             endian: Some(c.endian),
             mpu_present: Some(c.mpu_present),
             fpu_present: Some(c.fpu_present),
+            fpu_double_precision: c.fpu_double_precision,
+            dsp_present: c.dsp_present,
+            icache_present: c.icache_present,
+            dcache_present: c.dcache_present,
+            itcm_present: c.itcm_present,
+            dtcm_present: c.dtcm_present,
+            vtor_present: c.vtor_present,
             nvic_priority_bits: Some(c.nvic_priority_bits),
             has_vendor_systick: Some(c.has_vendor_systick),
+            device_num_interrupts: c.device_num_interrupts,
+            sau_num_regions: c.sau_num_regions,
         }
     }
 }
@@ -82,6 +133,41 @@ impl CpuBuilder {
         self.fpu_present = Some(value);
         self
     }
+    /// Set the fpu_double_precision of the cpu.
+    pub fn fpu_double_precision(mut self, value: Option<bool>) -> Self {
+        self.fpu_double_precision = value;
+        self
+    }
+    /// Set the dsp_present of the cpu.
+    pub fn dsp_present(mut self, value: Option<bool>) -> Self {
+        self.dsp_present = value;
+        self
+    }
+    /// Set the icache_present of the cpu.
+    pub fn icache_present(mut self, value: Option<bool>) -> Self {
+        self.icache_present = value;
+        self
+    }
+    /// Set the dcache_present of the cpu.
+    pub fn dcache_present(mut self, value: Option<bool>) -> Self {
+        self.dcache_present = value;
+        self
+    }
+    /// Set the itcm_present of the cpu.
+    pub fn itcm_present(mut self, value: Option<bool>) -> Self {
+        self.itcm_present = value;
+        self
+    }
+    /// Set the dtcm_present of the cpu.
+    pub fn dtcm_present(mut self, value: Option<bool>) -> Self {
+        self.dtcm_present = value;
+        self
+    }
+    /// Set the vtor_present of the cpu.
+    pub fn vtor_present(mut self, value: Option<bool>) -> Self {
+        self.vtor_present = value;
+        self
+    }
     /// Set the nvic_priority_bits of the cpu.
     pub fn nvic_priority_bits(mut self, value: u32) -> Self {
         self.nvic_priority_bits = Some(value);
@@ -92,6 +178,16 @@ impl CpuBuilder {
         self.has_vendor_systick = Some(value);
         self
     }
+    /// Set the device_num_interrupts of the cpu.
+    pub fn device_num_interrupts(mut self, value: Option<u32>) -> Self {
+        self.device_num_interrupts = value;
+        self
+    }
+    /// Set the sau_num_regions of the cpu.
+    pub fn sau_num_regions(mut self, value: Option<u32>) -> Self {
+        self.sau_num_regions = value;
+        self
+    }
     /// Validate and build a [`Cpu`].
     pub fn build(self, lvl: ValidateLevel) -> Result<Cpu, SvdError> {
         let mut cpu = Cpu {
@@ -110,12 +206,21 @@ impl CpuBuilder {
             fpu_present: self
                 .fpu_present
                 .ok_or_else(|| BuildError::Uninitialized("fpu_present".to_string()))?,
+            fpu_double_precision: self.fpu_double_precision,
+            dsp_present: self.dsp_present,
+            icache_present: self.icache_present,
+            dcache_present: self.dcache_present,
+            itcm_present: self.itcm_present,
+            dtcm_present: self.dtcm_present,
+            vtor_present: self.vtor_present,
             nvic_priority_bits: self
                 .nvic_priority_bits
                 .ok_or_else(|| BuildError::Uninitialized("nvic_priority_bits".to_string()))?,
             has_vendor_systick: self
                 .has_vendor_systick
                 .ok_or_else(|| BuildError::Uninitialized("has_vendor_systick".to_string()))?,
+            device_num_interrupts: self.device_num_interrupts,
+            sau_num_regions: self.sau_num_regions,
         };
         if !lvl.is_disabled() {
             cpu.validate(lvl)?;
@@ -146,12 +251,39 @@ impl Cpu {
         if let Some(fpu_present) = builder.fpu_present {
             self.fpu_present = fpu_present;
         }
+        if builder.fpu_double_precision.is_some() {
+            self.fpu_double_precision = builder.fpu_double_precision;
+        }
+        if builder.dsp_present.is_some() {
+            self.dsp_present = builder.dsp_present;
+        }
+        if builder.icache_present.is_some() {
+            self.icache_present = builder.icache_present;
+        }
+        if builder.dcache_present.is_some() {
+            self.dcache_present = builder.dcache_present;
+        }
+        if builder.itcm_present.is_some() {
+            self.itcm_present = builder.itcm_present;
+        }
+        if builder.dtcm_present.is_some() {
+            self.dtcm_present = builder.dtcm_present;
+        }
+        if builder.vtor_present.is_some() {
+            self.vtor_present = builder.vtor_present;
+        }
         if let Some(nvic_priority_bits) = builder.nvic_priority_bits {
             self.nvic_priority_bits = nvic_priority_bits;
         }
         if let Some(has_vendor_systick) = builder.has_vendor_systick {
             self.has_vendor_systick = has_vendor_systick;
         }
+        if builder.device_num_interrupts.is_some() {
+            self.device_num_interrupts = builder.device_num_interrupts;
+        }
+        if builder.sau_num_regions.is_some() {
+            self.sau_num_regions = builder.sau_num_regions;
+        }
         if !lvl.is_disabled() {
             self.validate(lvl)
         } else {