e310x

Author: burrbull

ci/script.sh

@@ -503,7 +503,7 @@ main() {
             echo '[dependencies.riscv-rt]' >> $td/Cargo.toml
             echo 'version = "0.8.0"' >> $td/Cargo.toml
 
-            test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd
+            test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd
             test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/k210-pac/master/k210.svd
             test_svd_for_target riscv https://raw.githubusercontent.com/riscv-rust/fu540-pac/master/fu540.svd
         ;;

ci/svd2rust-regress/tests.yml

@@ -2102,7 +2102,7 @@
 - arch: riscv
   mfgr: SiFive
   chip: E310x
-  svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x.svd
+  svd_url: https://raw.githubusercontent.com/riscv-rust/e310x/master/e310x/e310x.svd
   should_pass: false
   run_when: never
 - arch: msp430