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171 | 171 | //!
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172 | 172 | //! ```ignore
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173 | 173 | //! let mut peripherals = stm32f30x::Peripherals::take().unwrap();
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174 |
| -//! peripherals.GPIOA.odr.write(|w| w.bits(1)); |
| 174 | +//! peripherals.GPIOA.odr().write(|w| w.bits(1)); |
175 | 175 | //! ```
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176 | 176 | //!
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177 | 177 | //! This method can only be successfully called *once* -- that's why the method returns an `Option`.
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195 | 195 | //! impl PA0 {
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196 | 196 | //! fn is_high(&self) -> bool {
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197 | 197 | //! // NOTE(unsafe) actually safe because this is an atomic read with no side effects
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198 |
| -//! unsafe { (*GPIOA::ptr()).idr.read().bits() & 1 != 0 } |
| 198 | +//! unsafe { (*GPIOA::ptr()).idr().read().bits() & 1 != 0 } |
199 | 199 | //! }
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200 | 200 | //!
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201 | 201 | //! fn is_low(&self) -> bool {
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315 | 315 | //!
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316 | 316 | //! ```ignore
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317 | 317 | //! // is the SADD0 bit of the CR2 register set?
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318 |
| -//! if i2c1.c2r.read().sadd0().bit() { |
| 318 | +//! if i2c1.c2r().read().sadd0().bit() { |
319 | 319 | //! // yes
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320 | 320 | //! } else {
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321 | 321 | //! // no
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330 | 330 | //! Usage looks like this:
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331 | 331 | //!
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332 | 332 | //! ```ignore
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333 |
| -//! if i2c1.c2r.write().reset() |
| 333 | +//! if i2c1.c2r().write().reset() |
334 | 334 | //! ```
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335 | 335 | //!
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336 | 336 | //! ## `write`
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360 | 360 | //! // Starting from the reset value, `0x0000_0000`, change the bitfields SADD0
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361 | 361 | //! // and SADD1 to `1` and `0b0011110` respectively and write that to the
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362 | 362 | //! // register CR2.
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363 |
| -//! i2c1.cr2.write(|w| unsafe { w.sadd0().bit(true).sadd1().bits(0b0011110) }); |
| 363 | +//! i2c1.cr2().write(|w| unsafe { w.sadd0().bit(true).sadd1().bits(0b0011110) }); |
364 | 364 | //! // NOTE ^ unsafe because you could be writing a reserved bit pattern into
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365 | 365 | //! // the register. In this case, the SVD doesn't provide enough information to
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366 | 366 | //! // check whether that's the case.
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383 | 383 | //!
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384 | 384 | //! ```ignore
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385 | 385 | //! // Set the START bit to 1 while KEEPING the state of the other bits intact
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386 |
| -//! i2c1.cr2.modify(|_, w| unsafe { w.start().bit(true) }); |
| 386 | +//! i2c1.cr2().modify(|_, w| unsafe { w.start().bit(true) }); |
387 | 387 | //!
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388 | 388 | //! // TOGGLE the STOP bit, all the other bits will remain untouched
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389 |
| -//! i2c1.cr2.modify(|r, w| w.stop().bit(!r.stop().bit())); |
| 389 | +//! i2c1.cr2().modify(|r, w| w.stop().bit(!r.stop().bit())); |
390 | 390 | //! ```
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391 | 391 | //!
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392 | 392 | //! # enumeratedValues
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399 | 399 | //! The new `read` API returns an enum that you can match:
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400 | 400 | //!
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401 | 401 | //! ```ignore
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402 |
| -//! match gpioa.dir.read().pin0().variant() { |
| 402 | +//! match gpioa.dir().read().pin0().variant() { |
403 | 403 | //! gpioa::dir::PIN0_A::Input => { .. },
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404 | 404 | //! gpioa::dir::PIN0_A::Output => { .. },
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405 | 405 | //! }
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408 | 408 | //! or test for equality
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409 | 409 | //!
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410 | 410 | //! ```ignore
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411 |
| -//! if gpioa.dir.read().pin0().variant() == gpio::dir::PIN0_A::Input { |
| 411 | +//! if gpioa.dir().read().pin0().variant() == gpio::dir::PIN0_A::Input { |
412 | 412 | //! ..
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413 | 413 | //! }
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414 | 414 | //! ```
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417 | 417 | //! having to import the enum:
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418 | 418 | //!
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419 | 419 | //! ```ignore
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420 |
| -//! if gpioa.dir.read().pin0().is_input() { |
| 420 | +//! if gpioa.dir().read().pin0().is_input() { |
421 | 421 | //! ..
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422 | 422 | //! }
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423 | 423 | //!
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424 |
| -//! if gpioa.dir.read().pin0().is_output() { |
| 424 | +//! if gpioa.dir().read().pin0().is_output() { |
425 | 425 | //! ..
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426 | 426 | //! }
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427 | 427 | //! ```
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428 | 428 | //!
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429 | 429 | //! The original `bits` method is available as well:
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430 | 430 | //!
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431 | 431 | //! ```ignore
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432 |
| -//! if gpioa.dir.read().pin0().bits() == 0 { |
| 432 | +//! if gpioa.dir().read().pin0().bits() == 0 { |
433 | 433 | //! ..
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434 | 434 | //! }
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435 | 435 | //! ```
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439 | 439 | //!
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440 | 440 | //! ```ignore
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441 | 441 | //! // enum PIN0_A { Input, Output }
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442 |
| -//! gpioa.dir.write(|w| w.pin0().variant(gpio::dir::PIN0_A::Output)); |
| 442 | +//! gpioa.dir().write(|w| w.pin0().variant(gpio::dir::PIN0_A::Output)); |
443 | 443 | //! ```
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444 | 444 | //!
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445 | 445 | //! There are convenience methods to pick one of the variants without having to
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446 | 446 | //! import the enum:
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447 | 447 | //!
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448 | 448 | //! ```ignore
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449 |
| -//! gpioa.dir.write(|w| w.pin0().output()); |
| 449 | +//! gpioa.dir().write(|w| w.pin0().output()); |
450 | 450 | //! ```
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451 | 451 | //!
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452 | 452 | //! The `bits` (or `bit`) method is still available but will become safe if it's
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453 | 453 | //! impossible to write a reserved bit pattern into the register:
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454 | 454 | //!
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455 | 455 | //! ```ignore
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456 | 456 | //! // safe because there are only two options: `0` or `1`
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457 |
| -//! gpioa.dir.write(|w| w.pin0().bit(true)); |
| 457 | +//! gpioa.dir().write(|w| w.pin0().bit(true)); |
458 | 458 | //! ```
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459 | 459 | //!
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460 | 460 | //! # Interrupt API
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513 | 513 | //!
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514 | 514 | //! ```ignore
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515 | 515 | //! // These can be called from different contexts even though they are modifying the same register
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516 |
| -//! P1.p1out.set_bits(|w| unsafe { w.bits(1 << 1) }); |
517 |
| -//! P1.p1out.clear_bits(|w| unsafe { w.bits(!(1 << 2)) }); |
518 |
| -//! P1.p1out.toggle_bits(|w| unsafe { w.bits(1 << 4) }); |
| 516 | +//! P1.p1out().set_bits(|w| unsafe { w.bits(1 << 1) }); |
| 517 | +//! P1.p1out().clear_bits(|w| unsafe { w.bits(!(1 << 2)) }); |
| 518 | +//! P1.p1out().toggle_bits(|w| unsafe { w.bits(1 << 4) }); |
519 | 519 | //! // if impl_debug was used one can print Registers or RegisterBlocks
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520 | 520 | //! // print single register
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521 | 521 | //! println!("RTC_CNT {:#?}", unsafe { &*esp32s3::RTC_CNTL::ptr() }.options0);
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