Merge #675

675: use_cast r=therealprof a=burrbull

Fixes #671 

Co-authored-by: Andrey Zgarbul <[email protected]>

Author: bors[bot]

CHANGELOG.md

@@ -7,6 +7,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
 
 ## [Unreleased]
 
+- Don't cast fields with width 17-31
 - Make `generic.rs` generic
 - Change initial write value for registers with modifiedWriteValues
 - Update `clap` to 4.0, use `irx-config` instead of `clap_conf`

src/generate/generic.rs

@@ -4,6 +4,7 @@ use core::marker;
 pub trait RawReg:
     Copy
     + Default
+    + From<bool>
     + core::ops::BitOr<Output = Self>
     + core::ops::BitAnd<Output = Self>
     + core::ops::BitOrAssign
@@ -268,11 +269,12 @@ impl<REG: RegisterSpec> R<REG> {
 impl<REG: RegisterSpec, FI> PartialEq<FI> for R<REG>
 where
     REG::Ux: PartialEq,
-    FI: Copy + Into<REG::Ux>,
+    FI: Copy,
+    REG::Ux: From<FI>
 {
     #[inline(always)]
     fn eq(&self, other: &FI) -> bool {
-        self.bits.eq(&(*other).into())
+        self.bits.eq(&REG::Ux::from(*other))
     }
 }
 
@@ -359,21 +361,23 @@ where
 impl<U, FI> PartialEq<FI> for FieldReader<U, FI>
 where
     U: PartialEq,
-    FI: Copy + Into<U>,
+    FI: Copy,
+    U: From<FI>,
 {
     #[inline(always)]
     fn eq(&self, other: &FI) -> bool {
-        self.bits.eq(&(*other).into())
+        self.bits.eq(&U::from(*other))
     }
 }
 
 impl<FI> PartialEq<FI> for BitReader<FI>
 where
-    FI: Copy + Into<bool>,
+    FI: Copy,
+    bool: From<FI>,
 {
     #[inline(always)]
     fn eq(&self, other: &FI) -> bool {
-        self.bits.eq(&(*other).into())
+        self.bits.eq(&bool::from(*other))
     }
 }
 
@@ -404,7 +408,7 @@ pub struct Unsafe;
 pub struct FieldWriterRaw<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    FI: Into<N>,
+    N: From<FI>,
 {
     pub(crate) w: &'a mut REG::Writer,
     _field: marker::PhantomData<(N, FI, Safety)>,
@@ -414,7 +418,7 @@ impl<'a, U, REG, N, FI, Safety, const WI: u8, const O: u8>
     FieldWriterRaw<'a, U, REG, N, FI, Safety, WI, O>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    FI: Into<N>,
+    N: From<FI>,
 {
     /// Creates a new instance of the writer
     #[allow(unused)]
@@ -431,7 +435,7 @@ where
 pub struct BitWriterRaw<'a, U, REG, FI, M, const O: u8>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     pub(crate) w: &'a mut REG::Writer,
     _field: marker::PhantomData<(FI, M)>,
@@ -440,7 +444,7 @@ where
 impl<'a, U, REG, FI, M, const O: u8> BitWriterRaw<'a, U, REG, FI, M, O>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     /// Creates a new instance of the writer
     #[allow(unused)]
@@ -463,7 +467,7 @@ pub type FieldWriterSafe<'a, U, REG, N, FI, const WI: u8, const O: u8> =
 impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    FI: Into<N>,
+    N: From<FI>,
 {
     /// Field width
     pub const WIDTH: u8 = WI;
@@ -472,7 +476,7 @@ where
 impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    FI: Into<N>,
+    N: From<FI>,
 {
     /// Field width
     pub const WIDTH: u8 = WI;
@@ -489,7 +493,7 @@ macro_rules! bit_proxy {
         impl<'a, U, REG, FI, const OF: u8> $writer<'a, U, REG, FI, OF>
         where
             REG: Writable + RegisterSpec<Ux = U>,
-            FI: Into<bool>,
+            bool: From<FI>,
         {
             /// Field width
             pub const WIDTH: u8 = 1;
@@ -503,8 +507,7 @@ macro_rules! impl_bit_proxy {
         where
             REG: Writable + RegisterSpec<Ux = U>,
             U: RawReg,
-            U: From<bool>,
-            FI: Into<bool>,
+            bool: From<FI>,
         {
             /// Writes bit to the field
             #[inline(always)]
@@ -516,7 +519,7 @@ macro_rules! impl_bit_proxy {
             /// Writes `variant` to the field
             #[inline(always)]
             pub fn variant(self, variant: FI) -> &'a mut REG::Writer {
-                self.bit(variant.into())
+                self.bit(bool::from(variant))
             }
         }
     };
@@ -533,9 +536,8 @@ bit_proxy!(BitWriter0T, Bit0T);
 impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriter<'a, U, REG, N, FI, WI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    U: RawReg,
-    N: Into<U>,
-    FI: Into<N>,
+    U: RawReg + From<N>,
+    N: From<FI>,
 {
     /// Writes raw bits to the field
     ///
@@ -545,33 +547,32 @@ where
     #[inline(always)]
     pub unsafe fn bits(self, value: N) -> &'a mut REG::Writer {
         self.w.bits &= !(U::mask::<WI>() << { OF });
-        self.w.bits |= (value.into() & U::mask::<WI>()) << { OF };
+        self.w.bits |= (U::from(value) & U::mask::<WI>()) << { OF };
         self.w
     }
     /// Writes `variant` to the field
     #[inline(always)]
     pub fn variant(self, variant: FI) -> &'a mut REG::Writer {
-        unsafe { self.bits(variant.into()) }
+        unsafe { self.bits(N::from(variant)) }
     }
 }
 impl<'a, U, REG, N, FI, const WI: u8, const OF: u8> FieldWriterSafe<'a, U, REG, N, FI, WI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
-    U: RawReg,
-    N: Into<U>,
-    FI: Into<N>,
+    U: RawReg + From<N>,
+    N: From<FI>,
 {
     /// Writes raw bits to the field
     #[inline(always)]
     pub fn bits(self, value: N) -> &'a mut REG::Writer {
         self.w.bits &= !(U::mask::<WI>() << { OF });
-        self.w.bits |= (value.into() & U::mask::<WI>()) << { OF };
+        self.w.bits |= (U::from(value) & U::mask::<WI>()) << { OF };
         self.w
     }
     /// Writes `variant` to the field
     #[inline(always)]
     pub fn variant(self, variant: FI) -> &'a mut REG::Writer {
-        self.bits(variant.into())
+        self.bits(N::from(variant))
     }
 }
 
@@ -587,8 +588,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     /// Sets the field bit
     #[inline(always)]
@@ -606,8 +606,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1S<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     /// Sets the field bit
     #[inline(always)]
@@ -620,8 +619,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0C<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     /// Clears the field bit
     #[inline(always)]
@@ -634,8 +632,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1C<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     ///Clears the field bit by passing one
     #[inline(always)]
@@ -648,8 +645,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0S<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     ///Sets the field bit by passing zero
     #[inline(always)]
@@ -662,8 +658,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter1T<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     ///Toggle the field bit by passing one
     #[inline(always)]
@@ -676,8 +671,7 @@ impl<'a, U, REG, FI, const OF: u8> BitWriter0T<'a, U, REG, FI, OF>
 where
     REG: Writable + RegisterSpec<Ux = U>,
     U: RawReg,
-    U: From<bool>,
-    FI: Into<bool>,
+    bool: From<FI>,
 {
     ///Toggle the field bit by passing zero
     #[inline(always)]

src/generate/register.rs

@@ -436,10 +436,15 @@ pub fn fields(
         let rv = properties.reset_value.map(|rv| (rv >> offset) & mask);
         let fty = width.to_ty()?;
 
-        let use_mask = if let Some(size) = properties.size {
-            size != width
+        let use_mask;
+        let use_cast;
+        if let Some(size) = properties.size {
+            let size = size.to_ty_width()?;
+            use_cast = size != width.to_ty_width()?;
+            use_mask = size != width;
         } else {
-            true
+            use_cast = true;
+            use_mask = true;
         };
 
         let mut lookup_results = Vec::new();
@@ -481,10 +486,14 @@ pub fn fields(
                 quote! {
                     ((self.bits >> #offset) & #hexmask) #cast
                 }
-            } else if use_mask {
+            } else if use_cast {
                 quote! {
                     (self.bits & #hexmask) #cast
                 }
+            } else if use_mask {
+                quote! {
+                    self.bits & #hexmask
+                }
             } else {
                 quote! {
                     self.bits
@@ -713,10 +722,14 @@ pub fn fields(
                         quote! {
                             ((self.bits >> #sub_offset) & #hexmask) #cast
                         }
-                    } else if use_mask {
+                    } else if use_cast {
                         quote! {
                             (self.bits & #hexmask) #cast
                         }
+                    } else if use_mask {
+                        quote! {
+                            self.bits & #hexmask
+                        }
                     } else {
                         quote! {
                             self.bits