Merge pull request #280 from rust-embedded/add-position

Calculate _add position for peripherals and registers

Author: burrbull

CHANGELOG-rust.md

@@ -5,6 +5,8 @@ This changelog tracks the Rust `svdtools` project. See
 
 ## [Unreleased]
 
+* Calculate `_add` position for peripherals and registers
+
 ## [v0.4.4] 2025-02-08
 
 * Add `prefix` and `suffix` as opposite to `strip` and `strip_end`

Cargo.toml

@@ -29,9 +29,9 @@ rust-version = "1.70"
 clap = { version = "4.5", features = ["derive", "cargo", "color"] }
 serde = { version = "1.0", features = ["derive"] }
 quick-xml = { version = "0.36", features = ["serialize"] }
-svd-rs = { version = "0.14.9", features = ["serde", "derive-from"] }
-svd-parser = { version = "0.14.7", features = ["expand"] }
-svd-encoder = "0.14.5"
+svd-rs = { version = "0.14.11", features = ["serde", "derive-from"] }
+svd-parser = { version = "0.14.8", features = ["expand"] }
+svd-encoder = "0.14.6"
 # serde_yaml 0.9.x looks broken
 serde_yaml = "0.8.26"
 serde_json = { version = "1.0", features = ["preserve_order"] }

src/patch/device.rs

@@ -9,7 +9,7 @@ use std::{fs::File, io::Read, path::Path};
 use super::iterators::{MatchIter, Matched};
 use super::peripheral::{PeripheralExt, RegisterBlockExt};
 use super::yaml_ext::{AsType, GetVal};
-use super::{abspath, matchname, Config, PatchResult, Spec, VAL_LVL};
+use super::{abspath, adding_pos, matchname, Config, PatchResult, Spec, VAL_LVL};
 use super::{make_address_block, make_address_blocks, make_cpu, make_interrupt, make_peripheral};
 use super::{make_dim_element, modify_dim_element, modify_register_properties};
 
@@ -307,7 +307,8 @@ impl DeviceExt for Device {
             pnew.single()
         };
 
-        self.peripherals.push(pnew);
+        let pos = adding_pos(&pnew, &self.peripherals, |p| p.base_address);
+        self.peripherals.insert(pos, pnew);
         Ok(())
     }
 

src/patch/mod.rs

@@ -853,6 +853,20 @@ fn opt_interpolate<T: Interpolate>(path: &Option<&T>, s: Option<&str>) -> Option
     }
 }
 
+fn adding_pos<'a, T, U: Eq + Ord>(
+    new: &'a T,
+    iter: impl IntoIterator<Item = &'a T>,
+    f: impl Fn(&'a T) -> U,
+) -> usize {
+    let address = f(new);
+    iter.into_iter()
+        .enumerate()
+        .filter(|(_, p)| f(p) <= address)
+        .max_by_key(|(_, p)| f(p))
+        .map(|(i, _)| i + 1)
+        .unwrap_or(0)
+}
+
 trait Interpolate {
     fn interpolate<'a>(&self, s: &'a str) -> Cow<'a, str>;
     fn interpolate_opt(&self, s: Option<&str>) -> Option<String> {

src/patch/peripheral.rs

@@ -12,7 +12,7 @@ use super::iterators::{MatchIter, Matched};
 use super::register::{RegisterExt, RegisterInfoExt};
 use super::yaml_ext::{AsType, GetVal, ToYaml};
 use super::{
-    check_offsets, common_description, make_dim_element, matchname, matchsubspec,
+    adding_pos, check_offsets, common_description, make_dim_element, matchname, matchsubspec,
     modify_dim_element, spec_ind, Config, PatchResult, Spec, VAL_LVL,
 };
 use super::{make_cluster, make_interrupt, make_register};
@@ -161,6 +161,14 @@ pub(crate) trait RegisterBlockExt: Name {
 
     fn add_child(&mut self, child: RegisterCluster);
 
+    fn insert_child(&mut self, pos: usize, child: RegisterCluster) {
+        if let Some(children) = self.children_mut() {
+            children.insert(pos, child);
+        } else {
+            self.add_child(child);
+        }
+    }
+
     /// Delete registers and clusters matched by rspec inside ptag
     fn delete_child(&mut self, rcspec: &str) -> PatchResult {
         if let Some(children) = self.children_mut() {
@@ -214,7 +222,8 @@ pub(crate) trait RegisterBlockExt: Name {
                 Self::RB_TYPE
             ));
         }
-        self.add_child(RegisterCluster::Register({
+
+        let rnew = RegisterCluster::Register({
             let reg = make_register(radd, Some(bpath))?
                 .name(rname.into())
                 .build(VAL_LVL)?;
@@ -223,7 +232,18 @@ pub(crate) trait RegisterBlockExt: Name {
             } else {
                 reg.single()
             }
-        }));
+        });
+
+        if let Some(children) = self.children() {
+            let pos = adding_pos(&rnew, children, |rc| match rc {
+                RegisterCluster::Register(r) => r.address_offset,
+                RegisterCluster::Cluster(c) => c.address_offset,
+            });
+            self.insert_child(pos, rnew);
+        } else {
+            self.add_child(rnew);
+        }
+
         Ok(())
     }
 
@@ -235,7 +255,8 @@ pub(crate) trait RegisterBlockExt: Name {
                 Self::RB_TYPE
             ));
         }
-        self.add_child(RegisterCluster::Cluster({
+
+        let cnew = RegisterCluster::Cluster({
             let cl = make_cluster(cadd, Some(bpath))?
                 .name(cname.into())
                 .build(VAL_LVL)?;
@@ -244,7 +265,18 @@ pub(crate) trait RegisterBlockExt: Name {
             } else {
                 cl.single()
             }
-        }));
+        });
+
+        if let Some(children) = self.children() {
+            let pos = adding_pos(&cnew, children, |rc| match rc {
+                RegisterCluster::Register(r) => r.address_offset,
+                RegisterCluster::Cluster(c) => c.address_offset,
+            });
+            self.insert_child(pos, cnew);
+        } else {
+            self.add_child(cnew);
+        }
+
         Ok(())
     }