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EmilgardisEmilgardis
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Merge pull request #168 from rust-embedded/better_errors
Improve Could not find errors
2 parents 6525c97 + 5f748ca commit fae7192

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4 files changed

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4 files changed

+153
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‎CHANGELOG-rust.md‎

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -5,6 +5,8 @@ This changelog tracks the Rust `svdtools` project. See
55

66
## [Unreleased]
77

8+
* Improve "Could not find errors"
9+
810
## [v0.3.3] 2023-10-02
911

1012
* Fast fix for #161

‎src/patch/device.rs‎

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -387,7 +387,14 @@ impl DeviceExt for Device {
387387
.with_context(|| format!("Processing peripheral `{}`", ptag.name))?;
388388
}
389389
if pcount == 0 {
390-
Err(anyhow!("Could not find `{pspec}`"))
390+
Err(anyhow!(
391+
"Could not find `{pspec}. Present peripherals: {}.`",
392+
self.peripherals
393+
.iter()
394+
.map(|p| p.name.as_str())
395+
.collect::<Vec<_>>()
396+
.join(", ")
397+
))
391398
} else {
392399
Ok(())
393400
}

‎src/patch/peripheral.rs‎

Lines changed: 103 additions & 40 deletions
Original file line numberDiff line numberDiff line change
@@ -484,8 +484,15 @@ impl RegisterBlockExt for Peripheral {
484484
return Err(anyhow!("derive: incorrect syntax for {rname}"));
485485
};
486486

487-
self.get_register(rderive)
488-
.ok_or_else(|| anyhow!("register {rderive} not found"))?;
487+
self.get_register(rderive).ok_or_else(|| {
488+
anyhow!(
489+
"register {rderive} not found. Present registers: {}.`",
490+
self.registers()
491+
.map(|r| r.name.as_str())
492+
.collect::<Vec<_>>()
493+
.join(", ")
494+
)
495+
})?;
489496

490497
match self.get_mut_register(rname) {
491498
Some(register) => register.modify_from(info, VAL_LVL)?,
@@ -643,7 +650,13 @@ impl RegisterBlockExt for Peripheral {
643650
.with_context(|| format!("Processing register `{}`", rtag.name))?;
644651
}
645652
if rcount == 0 {
646-
Err(anyhow!("Could not find `{pname}:{rspec}`"))
653+
Err(anyhow!(
654+
"Could not find `{pname}:{rspec}. Present registers: {}.`",
655+
self.registers()
656+
.map(|r| r.name.as_str())
657+
.collect::<Vec<_>>()
658+
.join(", ")
659+
))
647660
} else {
648661
Ok(())
649662
}
@@ -659,7 +672,13 @@ impl RegisterBlockExt for Peripheral {
659672
.with_context(|| format!("Processing cluster `{}`", ctag.name))?;
660673
}
661674
if ccount == 0 {
662-
Err(anyhow!("Could not find `{pname}:{cspec}`"))
675+
Err(anyhow!(
676+
"Could not find `{pname}:{cspec}. Present clusters: {}.`",
677+
self.clusters()
678+
.map(|c| c.name.as_str())
679+
.collect::<Vec<_>>()
680+
.join(", ")
681+
))
663682
} else {
664683
Ok(())
665684
}
@@ -944,8 +963,15 @@ impl RegisterBlockExt for Cluster {
944963
return Err(anyhow!("derive: incorrect syntax for {rname}"));
945964
};
946965

947-
self.get_register(rderive)
948-
.ok_or_else(|| anyhow!("register {rderive} not found"))?;
966+
self.get_register(rderive).ok_or_else(|| {
967+
anyhow!(
968+
"register {rderive} not found. Present registers: {}.`",
969+
self.registers()
970+
.map(|r| r.name.as_str())
971+
.collect::<Vec<_>>()
972+
.join(", ")
973+
)
974+
})?;
949975

950976
match self.get_mut_register(rname) {
951977
Some(register) => register.modify_from(info, VAL_LVL)?,
@@ -1088,7 +1114,14 @@ impl RegisterBlockExt for Cluster {
10881114
.with_context(|| format!("Processing register `{}`", rtag.name))?;
10891115
}
10901116
if rcount == 0 {
1091-
Err(anyhow!("Could not find `{pname}:{rspec}`"))
1117+
Err(anyhow!(
1118+
"Could not find `{pname}:{}:{rspec}. Present registers: {}.`",
1119+
self.name,
1120+
self.registers()
1121+
.map(|r| r.name.as_str())
1122+
.collect::<Vec<_>>()
1123+
.join(", ")
1124+
))
10921125
} else {
10931126
Ok(())
10941127
}
@@ -1104,7 +1137,14 @@ impl RegisterBlockExt for Cluster {
11041137
.with_context(|| format!("Processing cluster `{}`", ctag.name))?;
11051138
}
11061139
if ccount == 0 {
1107-
Err(anyhow!("Could not find `{pname}:{cspec}`"))
1140+
Err(anyhow!(
1141+
"Could not find `{pname}:{}:{cspec}. Present clusters: {}.`",
1142+
self.name,
1143+
self.clusters()
1144+
.map(|c| c.name.as_str())
1145+
.collect::<Vec<_>>()
1146+
.join(", ")
1147+
))
11081148
} else {
11091149
Ok(())
11101150
}
@@ -1132,7 +1172,16 @@ fn collect_in_array(
11321172
}
11331173
}
11341174
if registers.is_empty() {
1135-
return Err(anyhow!("{path}: registers {rspec} not found"));
1175+
return Err(anyhow!(
1176+
"{path}: registers {rspec} not found. Present registers: {}.`",
1177+
regs.iter()
1178+
.filter_map(|rc| match rc {
1179+
RegisterCluster::Register(r) => Some(r.name.as_str()),
1180+
_ => None,
1181+
})
1182+
.collect::<Vec<_>>()
1183+
.join(", ")
1184+
));
11361185
}
11371186
registers.sort_by_key(|r| r.address_offset);
11381187
let Some((li, ri)) = spec_ind(rspec) else {
@@ -1153,14 +1202,20 @@ fn collect_in_array(
11531202
.iter()
11541203
.map(|r| r.address_offset)
11551204
.collect::<Vec<_>>();
1205+
let dim_increment = if dim > 1 { offsets[1] - offsets[0] } else { 0 };
1206+
if !check_offsets(&offsets, dim_increment) {
1207+
return Err(anyhow!(
1208+
"{}: registers cannot be collected into {rspec} array. Different addressOffset increments",
1209+
path
1210+
));
1211+
}
11561212
let bitmasks = registers
11571213
.iter()
11581214
.map(RegisterInfo::get_bitmask)
11591215
.collect::<Vec<_>>();
1160-
let dim_increment = if dim > 1 { offsets[1] - offsets[0] } else { 0 };
1161-
if !(check_offsets(&offsets, dim_increment) && bitmasks.iter().all(|&m| m == bitmasks[0])) {
1216+
if !bitmasks.iter().all(|&m| m == bitmasks[0]) {
11621217
return Err(anyhow!(
1163-
"{}: registers cannot be collected into {rspec} array",
1218+
"{}: registers cannot be collected into {rspec} array. Different bit masks",
11641219
path
11651220
));
11661221
}
@@ -1199,8 +1254,7 @@ fn collect_in_cluster(
11991254
cmod: &Hash,
12001255
) -> PatchResult {
12011256
let mut rdict = linked_hash_map::LinkedHashMap::new();
1202-
let mut first = true;
1203-
let mut check = true;
1257+
let mut first = None;
12041258
let mut dim = 0;
12051259
let mut dim_index = Vec::new();
12061260
let mut dim_increment = 0;
@@ -1229,7 +1283,16 @@ fn collect_in_cluster(
12291283
}
12301284
}
12311285
if registers.is_empty() {
1232-
return Err(anyhow!("{path}: registers {rspec} not found"));
1286+
return Err(anyhow!(
1287+
"{path}: registers {rspec} not found. Present registers: {}.`",
1288+
regs.iter()
1289+
.filter_map(|rc| match rc {
1290+
RegisterCluster::Register(r) => Some(r.name.as_str()),
1291+
_ => None,
1292+
})
1293+
.collect::<Vec<_>>()
1294+
.join(", ")
1295+
));
12331296
}
12341297
if single {
12351298
if registers.len() > 1 {
@@ -1253,43 +1316,43 @@ fn collect_in_cluster(
12531316
Ok(r.name[li..r.name.len() - ri].to_string())
12541317
})
12551318
.collect::<Result<Vec<_>, _>>();
1256-
let new_dim_index = match new_dim_index {
1257-
Ok(v) => v,
1258-
Err(e) => return Err(e),
1259-
};
1260-
if first {
1319+
let new_dim_index = new_dim_index?;
1320+
if let Some(rspec1) = first.as_ref() {
1321+
let len = registers.len();
1322+
if dim != len {
1323+
return Err(anyhow!(
1324+
"{path}: registers cannot be collected into {cname} cluster. Different number of registers {rspec} ({len}) and {rspec1} ({dim})"
1325+
));
1326+
}
1327+
if dim_index != new_dim_index {
1328+
return Err(anyhow!(
1329+
"{path}: registers cannot be collected into {cname} cluster. {rspec} and {rspec1} have different indeces"
1330+
));
1331+
}
1332+
} else {
12611333
dim = registers.len();
12621334
dim_index = new_dim_index;
1263-
dim_increment = 0;
12641335
offsets = registers
12651336
.iter()
12661337
.map(|r| r.address_offset)
12671338
.collect::<Vec<_>>();
12681339
if dim > 1 {
12691340
dim_increment = offsets[1] - offsets[0];
12701341
}
1271-
if !(check_offsets(&offsets, dim_increment)
1272-
&& bitmasks.iter().all(|&m| m == bitmasks[0]))
1273-
{
1274-
check = false;
1275-
break;
1276-
}
1277-
} else if (dim != registers.len())
1278-
|| (dim_index != new_dim_index)
1279-
|| (!check_offsets(&offsets, dim_increment))
1280-
|| (!bitmasks.iter().all(|&m| m == bitmasks[0]))
1281-
{
1282-
check = false;
1283-
break;
1342+
first = Some(rspec.clone());
1343+
}
1344+
if !check_offsets(&offsets, dim_increment) {
1345+
return Err(anyhow!(
1346+
"{path}: registers cannot be collected into {cname} cluster. Different addressOffset increments in {rspec} registers"
1347+
));
1348+
}
1349+
if !bitmasks.iter().all(|&m| m == bitmasks[0]) {
1350+
return Err(anyhow!(
1351+
"{path}: registers cannot be collected into {cname} cluster. Different bit masks in {rspec} registers"
1352+
));
12841353
}
12851354
}
12861355
rdict.insert(rspec.to_string(), registers);
1287-
first = false;
1288-
}
1289-
if !check {
1290-
return Err(anyhow!(
1291-
"{path}: registers cannot be collected into {cname} cluster"
1292-
));
12931356
}
12941357
let address_offset = rdict
12951358
.values()

‎src/patch/register.rs‎

Lines changed: 40 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -321,8 +321,12 @@ impl RegisterExt for Register {
321321

322322
if names.is_empty() {
323323
return Err(anyhow!(
324-
"Could not find any fields to merge {}.{key}",
325-
self.name
324+
"Could not find any fields to merge {}:{key}. Present fields: {}.`",
325+
self.name,
326+
self.fields()
327+
.map(|f| f.name.as_str())
328+
.collect::<Vec<_>>()
329+
.join(", ")
326330
));
327331
}
328332
let mut bitwidth = 0;
@@ -370,7 +374,14 @@ impl RegisterExt for Register {
370374
}
371375
}
372376
if fields.is_empty() {
373-
return Err(anyhow!("{}: fields {fspec} not found", self.name));
377+
return Err(anyhow!(
378+
"{}: fields {fspec} not found. Present fields: {}.`",
379+
self.name,
380+
self.fields()
381+
.map(|f| f.name.as_str())
382+
.collect::<Vec<_>>()
383+
.join(", ")
384+
));
374385
}
375386
fields.sort_by_key(|f| f.bit_range.offset);
376387
let Some((li, ri)) = spec_ind(fspec) else {
@@ -394,7 +405,7 @@ impl RegisterExt for Register {
394405
let dim_increment = if dim > 1 { offsets[1] - offsets[0] } else { 0 };
395406
if !check_offsets(&offsets, dim_increment) {
396407
return Err(anyhow!(
397-
"{}: registers cannot be collected into {fspec} array",
408+
"{}: fields cannot be collected into {fspec} array. Different bitOffset increments",
398409
self.name
399410
));
400411
}
@@ -430,15 +441,19 @@ impl RegisterExt for Register {
430441
let (new_fields, name) = match (it.next(), it.next()) {
431442
(None, _) => {
432443
return Err(anyhow!(
433-
"Could not find any fields to split {}.{fspec}",
434-
self.name
435-
))
444+
"Could not find any fields to split {}:{fspec}. Present fields: {}.`",
445+
self.name,
446+
self.fields()
447+
.map(|f| f.name.as_str())
448+
.collect::<Vec<_>>()
449+
.join(", ")
450+
));
436451
}
437452
(Some(_), Some(_)) => {
438453
return Err(anyhow!(
439-
"Only one field can be spitted at time {}.{fspec}",
454+
"Only one field can be splitted at time {}:{fspec}",
440455
self.name
441-
))
456+
));
442457
}
443458
(Some(first), None) => {
444459
let name = if let Some(n) = fsplit.get_str("name")? {
@@ -687,7 +702,14 @@ impl RegisterExt for Register {
687702
.map(|f| (f.bit_range.offset, f.name.to_string()))
688703
.collect::<Vec<_>>();
689704
if offsets.is_empty() {
690-
return Err(anyhow!("Could not find {pname}:{}.{fspec}", self.name));
705+
return Err(anyhow!(
706+
"Could not find field {pname}:{}:{fspec}. Present fields: {}.`",
707+
self.name,
708+
self.fields()
709+
.map(|f| f.name.as_str())
710+
.collect::<Vec<_>>()
711+
.join(", ")
712+
));
691713
}
692714
let (min_offset, fname) = offsets.iter().min_by_key(|on| on.0).unwrap();
693715
let name = make_ev_name(&fname.replace("%s", ""), usage)?;
@@ -727,7 +749,14 @@ impl RegisterExt for Register {
727749
set_any = true;
728750
}
729751
if !set_any {
730-
return Err(anyhow!("Could not find {pname}:{}.{fspec}", self.name));
752+
return Err(anyhow!(
753+
"Could not find field {pname}:{}:{fspec}. Present fields: {}.`",
754+
self.name,
755+
self.fields()
756+
.map(|f| f.name.as_str())
757+
.collect::<Vec<_>>()
758+
.join(", ")
759+
));
731760
}
732761
Ok(())
733762
}

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