Add minutes for 2024-01-23

Author: adamgreig

minutes/2024-01-23.md

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+# Embedded Working Group Meeting 2024-01-23
+
+* [Coordination Repository]
+* Meetings: Tuesday 8pm Europe/Berlin time
+* [Join the Chat]
+* Today's date: 2024-01-23
+* [Nominated issues](https://github.com/search?q=org%3Arust-embedded+label%3Anominated+is%3Aopen&type=Issues)
+* [IRC logs]
+
+[Coordination Repository]: https://github.com/rust-embedded/wg
+[Join the Chat]: https://matrix.to/#/#rust-embedded:matrix.org
+[IRC logs]: https://libera.irclog.whitequark.org/rust-embedded/2024-01-23
+
+## Attendance
+
+Write your GH username or Matrix handle here!
+
+* adamgreig
+* GrantM11235
+* jannic
+* therealprof
+* bartmassey
+* eldruin
+* mabez
+* elpiel
+* newAM
+
+## Agenda
+
+* Announcements
+    * svdtools 0.3.9 released
+* Embedded HAL
+    * ADC/voltmeter/ammeter traits https://github.com/rust-embedded/embedded-hal/pull/569
+        * Having volts and amps seems a bit arbitrary; should we also have temperature and light level and etc etc?
+        * There might be some value in such a set of traits but it doesn't seem like they belong in e-h
+        * Probably the original plan of an ADC trait is a better fit for embedded-hal, but there are design questions to resolve
+    * SPI sharing with fallible CS pins https://github.com/rust-embedded/embedded-hal/issues/573
+        * Perhaps the whole shared bus could be poisoned to reduce the runtime overhead
+        * But given the rarity of requiring fallible pins and not being able to just wrap them in a panicking wrapper, perhaps option 1 remains the best option for e-h-bus, with users requiring more sophisticated sharing/error handling able to roll their own
+        * @GrantM11235 to write a PR
+* svd2rust
+    * Safe/unsafe writers https://github.com/rust-embedded/svd2rust/pull/788
+* Continue last week's discussion on interrupt macro syntax across crates
+
+## Last Week's Minutes
+
+* Announcements
+    * embedded-hal v1.0.0 released! :tada: 
+    * risc-v releases: risc-v 0.11, riscv-rt 0.12, riscv-pac 0.1, riscv-semihosting 0.1
+    * linux-embedded-hal 0.4 was released with embedded-hal updated to 1.0
+* Commonality between cortex-m and riscv interrupt macros
+    * Could we unify the interrupt-declaring syntax?
+    * Currently riscv-rt just has the user export a suitably-named symbol, which would also work for c-m-rt
+        * But this doesn't permit the &static mut transform, or ensure that the method can't be called except by hardware as an interrupt, and doesn't check the function type signature
+        * We could recommend this for c-m-rt
+    * Could c-m-rt's interrupt macro take the interrupt name as an (optional?) argument, so the function could then be named arbitrarily instead?
+        * avr-device requires the chip name be passed to the interrupt macro, so couldn't immediately work with this syntax, but maybe could be refactored later to support it
+    * What about exception macros (e.g. when used to provide the exceptionframe in a hardfault on c-m-rt) or the entry macro (which also provides the static mut transform)?
+    * TBC