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lines changed Original file line number Diff line number Diff line change @@ -134,6 +134,18 @@ Changes to the X86 Target
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* Machine model for AMD bdver2 (Piledriver) CPU was added. It is used to support
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instruction scheduling and other instruction cost heuristics.
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+ * New AVX512F gather and scatter intrinsics were added that take a <X x i1> mask
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+ instead of a scalar integer. This removes the need for a bitcast in IR. The
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+ new intrinsics are named like the old intrinsics with ``llvm.avx512. ``
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+ replaced with ``llvm.avx512.mask. ``. The old intrinsics will be removed in a
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+ future release.
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+
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+ * Added ``cascadelake `` as a CPU name for -march. This is ``skylake-avx512 ``
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+ with the addition of the ``avx512vnni `` instruction set.
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+
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+ * ADCX instruction will no longer be emitted. This instruction is rarely better
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+ than the legacy ADC instruction and just increased code size.
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+
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Changes to the AMDGPU Target
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-----------------------------
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@@ -156,6 +168,10 @@ use for it will be to add support for returning small structs as multiple
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return values, once the underlying WebAssembly platform itself supports it.
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Additionally, multithreading support is not yet included in the stable ABI.
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+ Changes to the Nios2 Target
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+ ---------------------------
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+
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+ * The Nios2 target was removed from this release.
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Changes to the OCaml bindings
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