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Remove code for warning about missing GenMC support
1 parent 88a905b commit 0c9d51a

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6 files changed

+1
-108
lines changed

6 files changed

+1
-108
lines changed

src/concurrency/genmc/mapping.rs

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -34,17 +34,6 @@ impl AtomicFenceOrd {
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}
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impl AtomicRwOrd {
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/// Split up an atomic read-write memory ordering into a separate read and write ordering.
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pub(super) fn split_memory_orderings(self) -> (AtomicReadOrd, AtomicWriteOrd) {
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match self {
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AtomicRwOrd::Relaxed => (AtomicReadOrd::Relaxed, AtomicWriteOrd::Relaxed),
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AtomicRwOrd::Acquire => (AtomicReadOrd::Acquire, AtomicWriteOrd::Relaxed),
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AtomicRwOrd::Release => (AtomicReadOrd::Relaxed, AtomicWriteOrd::Release),
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AtomicRwOrd::AcqRel => (AtomicReadOrd::Acquire, AtomicWriteOrd::Release),
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AtomicRwOrd::SeqCst => (AtomicReadOrd::SeqCst, AtomicWriteOrd::SeqCst),
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}
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}
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/// Split up the atomic success ordering of a read-modify-write operation into GenMC's representation.
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/// Note that both returned orderings are currently identical, because this is what GenMC expects.
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pub(super) fn to_genmc_memory_orderings(self) -> (MemOrdering, MemOrdering) {

src/concurrency/genmc/mod.rs

Lines changed: 1 addition & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,6 @@ use self::helper::{
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use self::mapping::{min_max_to_genmc_rmw_op, to_genmc_rmw_op};
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use self::thread_info_manager::ThreadInfoManager;
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use crate::concurrency::genmc::helper::{is_terminator_atomic, split_access};
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use crate::concurrency::genmc::warnings::WarningsCache;
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use crate::concurrency::thread::{EvalContextExt as _, ThreadState};
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use crate::{
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AtomicFenceOrd, AtomicReadOrd, AtomicRwOrd, AtomicWriteOrd, BlockReason, MemoryKind,
@@ -33,7 +32,6 @@ mod helper;
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mod mapping;
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pub mod miri_genmc;
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mod thread_info_manager;
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mod warnings;
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pub use genmc_sys::GenmcParams;
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@@ -61,11 +59,7 @@ pub struct GenmcCtx {
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/// Keep track of global allocations, to ensure they keep the same address across different executions, even if the order of allocations changes.
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/// The `AllocId` for globals is stable across executions, so we can use it as an identifier.
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global_allocations: Arc<GlobalAllocationHandler>,
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// TODO GENMC: maybe make this a (base, size), maybe BTreeMap/sorted vector for reverse lookups
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// GenMC needs to have access to that
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// TODO: look at code of "pub struct GlobalStateInner"
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warnings_cache: RefCell<WarningsCache>,
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// terminator_cache: RefCell<FxHashMap<rustc_middle::ty::Ty<'tcx>, bool>>,
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exit_status: Cell<Option<ExitStatus>>,
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}
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@@ -85,7 +79,6 @@ impl GenmcCtx {
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thread_infos: Default::default(),
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allow_data_races: Cell::new(false),
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global_allocations: Default::default(),
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warnings_cache: Default::default(),
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exit_status: Cell::new(None),
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}
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}
@@ -358,13 +351,6 @@ impl GenmcCtx {
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) -> InterpResult<'tcx, (Scalar, bool, bool)> {
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assert!(!self.allow_data_races.get()); // TODO GENMC: handle this properly
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// FIXME(genmc): remove once GenMC supports failure memory ordering in `compare_exchange`.
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self.warnings_cache.borrow_mut().warn_once_rmw_failure_ordering(&ecx.tcx, success, fail);
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// FIXME(genmc): remove once GenMC implements spurious failures for `compare_exchange_weak`.
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if can_fail_spuriously {
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self.warnings_cache.borrow_mut().warn_once_compare_exchange_weak(&ecx.tcx);
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}
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368354
let machine = &ecx.machine;
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let (success_load_ordering, success_store_ordering) = success.to_genmc_memory_orderings();
370356
let fail_load_ordering = fail.convert();

src/concurrency/genmc/warnings.rs

Lines changed: 0 additions & 66 deletions
This file was deleted.
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Original file line numberDiff line numberDiff line change
@@ -1,7 +1,3 @@
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warning: GenMC mode currently does not model spurious failures of `compare_exchange_weak`. This may lead to missed bugs (possible unsoundness)!
2-
3-
warning: GenMC currently does not model the atomic failure ordering for `compare_exchange`. Failure ordering 'Relaxed' is treated like 'Acquire', which means that Miri might miss bugs related to this memory access (possible unsoundness)!
4-
51

62
(GenMC) Verification complete. No errors were detected.
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Number of complete executions explored: 1
Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,3 @@
1-
warning: GenMC mode currently does not model spurious failures of `compare_exchange_weak`. This may lead to missed bugs (possible unsoundness)!
2-
3-
warning: GenMC currently does not model the atomic failure ordering for `compare_exchange`. Failure ordering 'Relaxed' is treated like 'Acquire', which means that Miri might miss bugs related to this memory access (possible unsoundness)!
4-
5-
warning: GenMC currently does not model the atomic failure ordering for `compare_exchange`. Failure ordering 'Acquire' is treated like 'Relaxed', which means that Miri might incorrectly detect errors related to this memory access (possible false positives).
6-
71

82
(GenMC) Verification complete. No errors were detected.
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Number of complete executions explored: 1
Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,3 @@
1-
warning: GenMC currently does not model the atomic failure ordering for `compare_exchange`. Failure ordering 'Relaxed' is treated like 'Acquire', which means that Miri might miss bugs related to this memory access (possible unsoundness)!
2-
3-
warning: GenMC mode currently does not model spurious failures of `compare_exchange_weak`. This may lead to missed bugs (possible unsoundness)!
4-
5-
warning: GenMC currently does not model the atomic failure ordering for `compare_exchange`. Failure ordering 'Acquire' is treated like 'Relaxed', which means that Miri might incorrectly detect errors related to this memory access (possible false positives).
6-
71

82
(GenMC) Verification complete. No errors were detected.
93
Number of complete executions explored: 1

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