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Implement simd_fma and simd_relaxed_fma in const-eval
1 parent 30b3369 commit 56d04f0

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2 files changed

+2
-60
lines changed

2 files changed

+2
-60
lines changed

src/intrinsics/simd.rs

Lines changed: 0 additions & 58 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,3 @@
1-
use rand::Rng;
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use rustc_apfloat::Float;
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use rustc_middle::ty;
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use rustc_middle::ty::FloatTy;
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@@ -83,62 +81,6 @@ pub trait EvalContextExt<'tcx>: crate::MiriInterpCxExt<'tcx> {
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this.write_scalar(val, &dest)?;
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}
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}
86-
"fma" | "relaxed_fma" => {
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let [a, b, c] = check_intrinsic_arg_count(args)?;
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let (a, a_len) = this.project_to_simd(a)?;
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let (b, b_len) = this.project_to_simd(b)?;
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let (c, c_len) = this.project_to_simd(c)?;
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let (dest, dest_len) = this.project_to_simd(dest)?;
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assert_eq!(dest_len, a_len);
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assert_eq!(dest_len, b_len);
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assert_eq!(dest_len, c_len);
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for i in 0..dest_len {
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let a = this.read_scalar(&this.project_index(&a, i)?)?;
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let b = this.read_scalar(&this.project_index(&b, i)?)?;
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let c = this.read_scalar(&this.project_index(&c, i)?)?;
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let dest = this.project_index(&dest, i)?;
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let fuse: bool = intrinsic_name == "fma"
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|| (this.machine.float_nondet && this.machine.rng.get_mut().random());
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// Works for f32 and f64.
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// FIXME: using host floats to work around https://github.com/rust-lang/miri/issues/2468.
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let ty::Float(float_ty) = dest.layout.ty.kind() else {
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span_bug!(this.cur_span(), "{} operand is not a float", intrinsic_name)
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};
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let val = match float_ty {
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FloatTy::F16 => unimplemented!("f16_f128"),
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FloatTy::F32 => {
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let a = a.to_f32()?;
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let b = b.to_f32()?;
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let c = c.to_f32()?;
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let res = if fuse {
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a.mul_add(b, c).value
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} else {
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((a * b).value + c).value
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};
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let res = this.adjust_nan(res, &[a, b, c]);
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Scalar::from(res)
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}
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FloatTy::F64 => {
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let a = a.to_f64()?;
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let b = b.to_f64()?;
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let c = c.to_f64()?;
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let res = if fuse {
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a.mul_add(b, c).value
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} else {
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((a * b).value + c).value
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};
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let res = this.adjust_nan(res, &[a, b, c]);
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Scalar::from(res)
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}
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FloatTy::F128 => unimplemented!("f16_f128"),
138-
};
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this.write_scalar(val, &dest)?;
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}
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}
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"expose_provenance" => {
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let [op] = check_intrinsic_arg_count(args)?;
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let (op, op_len) = this.project_to_simd(op)?;

src/machine.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1324,8 +1324,8 @@ impl<'tcx> Machine<'tcx> for MiriMachine<'tcx> {
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}
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#[inline(always)]
1327-
fn float_fuse_mul_add(ecx: &mut InterpCx<'tcx, Self>) -> bool {
1328-
ecx.machine.float_nondet && ecx.machine.rng.get_mut().random()
1327+
fn float_fuse_mul_add(ecx: &InterpCx<'tcx, Self>) -> bool {
1328+
ecx.machine.float_nondet && ecx.machine.rng.borrow_mut().random()
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}
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#[inline(always)]

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