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Partially carve macros.rs into other files
The base impl_vector! in macros.rs is staying put for the moment as it must go first before everything in order to work. Everything else, like transmutes, specific type impls, etc. have been moved into appropriate files elsewhere to subdivide concerns.
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6 files changed

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lines changed

‎crates/core_simd/src/lib.rs

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@@ -8,6 +8,8 @@
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mod macros;
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#[macro_use]
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mod permute;
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#[macro_use]
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mod transmute;
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mod fmt;
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mod intrinsics;

‎crates/core_simd/src/macros.rs

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/// Provides implementations of `From<$a> for $b` and `From<$b> for $a` that transmutes the value.
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macro_rules! from_transmute {
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{ unsafe $a:ty => $b:ty } => {
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from_transmute!{ @impl $a => $b }
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from_transmute!{ @impl $b => $a }
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};
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{ @impl $from:ty => $to:ty } => {
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impl core::convert::From<$from> for $to {
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#[inline]
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fn from(value: $from) -> $to {
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unsafe { core::mem::transmute(value) }
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}
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}
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};
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}
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/// Provides implementations of `From<$generic> for core::arch::{x86, x86_64}::$intel` and
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/// vice-versa that transmutes the value.
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macro_rules! from_transmute_x86 {
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{ unsafe $generic:ty => $intel:ident } => {
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#[cfg(target_arch = "x86")]
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from_transmute! { unsafe $generic => core::arch::x86::$intel }
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#[cfg(target_arch = "x86_64")]
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from_transmute! { unsafe $generic => core::arch::x86_64::$intel }
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}
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}
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/// Implements common traits on the specified vector `$name`, holding multiple `$lanes` of `$type`.
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macro_rules! impl_vector {
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{ $name:ident, $type:ty } => {
@@ -150,69 +122,3 @@ macro_rules! impl_vector {
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impl_shuffle_2pow_lanes!{ $name }
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}
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}
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/// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
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macro_rules! impl_integer_vector {
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{ $name:ident, $type:ty } => {
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impl_vector! { $name, $type }
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impl<const LANES: usize> Eq for $name<LANES> where Self: crate::LanesAtMost64 {}
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impl<const LANES: usize> Ord for $name<LANES> where Self: crate::LanesAtMost64 {
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#[inline]
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fn cmp(&self, other: &Self) -> core::cmp::Ordering {
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// TODO use SIMD cmp
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self.to_array().cmp(other.as_ref())
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}
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}
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impl<const LANES: usize> core::hash::Hash for $name<LANES> where Self: crate::LanesAtMost64 {
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#[inline]
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fn hash<H>(&self, state: &mut H)
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where
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H: core::hash::Hasher
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{
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self.as_slice().hash(state)
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}
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}
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}
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}
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/// Implements inherent methods for a float vector `$name` containing multiple
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/// `$lanes` of float `$type`, which uses `$bits_ty` as its binary
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/// representation. Called from `define_float_vector!`.
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macro_rules! impl_float_vector {
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{ $name:ident, $type:ty, $bits_ty:ident } => {
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impl_vector! { $name, $type }
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impl<const LANES: usize> $name<LANES>
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where
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Self: crate::LanesAtMost64,
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crate::$bits_ty<LANES>: crate::LanesAtMost64,
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{
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/// Raw transmutation to an unsigned integer vector type with the
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/// same size and number of lanes.
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#[inline]
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pub fn to_bits(self) -> crate::$bits_ty<LANES> {
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assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
198-
unsafe { core::mem::transmute_copy(&self) }
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}
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/// Raw transmutation from an unsigned integer vector type with the
202-
/// same size and number of lanes.
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#[inline]
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pub fn from_bits(bits: crate::$bits_ty<LANES>) -> Self {
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assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
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unsafe { core::mem::transmute_copy(&bits) }
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}
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/// Produces a vector where every lane has the absolute value of the
210-
/// equivalently-indexed lane in `self`.
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#[inline]
212-
pub fn abs(self) -> Self {
213-
let no_sign = crate::$bits_ty::splat(!0 >> 1);
214-
Self::from_bits(self.to_bits() & no_sign)
215-
}
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}
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};
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}

‎crates/core_simd/src/transmute.rs

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@@ -0,0 +1,27 @@
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/// Provides implementations of `From<$a> for $b` and `From<$b> for $a` that transmutes the value.
2+
macro_rules! from_transmute {
3+
{ unsafe $a:ty => $b:ty } => {
4+
from_transmute!{ @impl $a => $b }
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from_transmute!{ @impl $b => $a }
6+
};
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{ @impl $from:ty => $to:ty } => {
8+
impl core::convert::From<$from> for $to {
9+
#[inline]
10+
fn from(value: $from) -> $to {
11+
unsafe { core::mem::transmute(value) }
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}
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}
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};
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}
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17+
/// Provides implementations of `From<$generic> for core::arch::{x86, x86_64}::$intel` and
18+
/// vice-versa that transmutes the value.
19+
macro_rules! from_transmute_x86 {
20+
{ unsafe $generic:ty => $intel:ident } => {
21+
#[cfg(target_arch = "x86")]
22+
from_transmute! { unsafe $generic => core::arch::x86::$intel }
23+
24+
#[cfg(target_arch = "x86_64")]
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from_transmute! { unsafe $generic => core::arch::x86_64::$intel }
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}
27+
}

‎crates/core_simd/src/vector/float.rs

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@@ -1,5 +1,45 @@
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#![allow(non_camel_case_types)]
22

3+
/// Implements inherent methods for a float vector `$name` containing multiple
4+
/// `$lanes` of float `$type`, which uses `$bits_ty` as its binary
5+
/// representation. Called from `define_float_vector!`.
6+
macro_rules! impl_float_vector {
7+
{ $name:ident, $type:ty, $bits_ty:ident } => {
8+
impl_vector! { $name, $type }
9+
10+
impl<const LANES: usize> $name<LANES>
11+
where
12+
Self: crate::LanesAtMost64,
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crate::$bits_ty<LANES>: crate::LanesAtMost64,
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{
15+
/// Raw transmutation to an unsigned integer vector type with the
16+
/// same size and number of lanes.
17+
#[inline]
18+
pub fn to_bits(self) -> crate::$bits_ty<LANES> {
19+
assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
20+
unsafe { core::mem::transmute_copy(&self) }
21+
}
22+
23+
/// Raw transmutation from an unsigned integer vector type with the
24+
/// same size and number of lanes.
25+
#[inline]
26+
pub fn from_bits(bits: crate::$bits_ty<LANES>) -> Self {
27+
assert_eq!(core::mem::size_of::<Self>(), core::mem::size_of::<crate::$bits_ty<LANES>>());
28+
unsafe { core::mem::transmute_copy(&bits) }
29+
}
30+
31+
/// Produces a vector where every lane has the absolute value of the
32+
/// equivalently-indexed lane in `self`.
33+
#[inline]
34+
pub fn abs(self) -> Self {
35+
let no_sign = crate::$bits_ty::splat(!0 >> 1);
36+
Self::from_bits(self.to_bits() & no_sign)
37+
}
38+
}
39+
};
40+
}
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/// A SIMD vector of containing `LANES` `f32` values.
444
#[repr(simd)]
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pub struct SimdF32<const LANES: usize>([f32; LANES])

‎crates/core_simd/src/vector/int.rs

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@@ -1,5 +1,32 @@
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#![allow(non_camel_case_types)]
22

3+
/// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
4+
macro_rules! impl_integer_vector {
5+
{ $name:ident, $type:ty } => {
6+
impl_vector! { $name, $type }
7+
8+
impl<const LANES: usize> Eq for $name<LANES> where Self: crate::LanesAtMost64 {}
9+
10+
impl<const LANES: usize> Ord for $name<LANES> where Self: crate::LanesAtMost64 {
11+
#[inline]
12+
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
13+
// TODO use SIMD cmp
14+
self.to_array().cmp(other.as_ref())
15+
}
16+
}
17+
18+
impl<const LANES: usize> core::hash::Hash for $name<LANES> where Self: crate::LanesAtMost64 {
19+
#[inline]
20+
fn hash<H>(&self, state: &mut H)
21+
where
22+
H: core::hash::Hasher
23+
{
24+
self.as_slice().hash(state)
25+
}
26+
}
27+
}
28+
}
29+
330
/// A SIMD vector of containing `LANES` `isize` values.
431
#[repr(simd)]
532
pub struct SimdIsize<const LANES: usize>([isize; LANES])

‎crates/core_simd/src/vector/uint.rs

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@@ -1,12 +1,40 @@
11
#![allow(non_camel_case_types)]
22

3+
4+
/// Implements additional integer traits (Eq, Ord, Hash) on the specified vector `$name`, holding multiple `$lanes` of `$type`.
5+
macro_rules! impl_unsigned_vector {
6+
{ $name:ident, $type:ty } => {
7+
impl_vector! { $name, $type }
8+
9+
impl<const LANES: usize> Eq for $name<LANES> where Self: crate::LanesAtMost64 {}
10+
11+
impl<const LANES: usize> Ord for $name<LANES> where Self: crate::LanesAtMost64 {
12+
#[inline]
13+
fn cmp(&self, other: &Self) -> core::cmp::Ordering {
14+
// TODO use SIMD cmp
15+
self.to_array().cmp(other.as_ref())
16+
}
17+
}
18+
19+
impl<const LANES: usize> core::hash::Hash for $name<LANES> where Self: crate::LanesAtMost64 {
20+
#[inline]
21+
fn hash<H>(&self, state: &mut H)
22+
where
23+
H: core::hash::Hasher
24+
{
25+
self.as_slice().hash(state)
26+
}
27+
}
28+
}
29+
}
30+
331
/// A SIMD vector of containing `LANES` `usize` values.
432
#[repr(simd)]
533
pub struct SimdUsize<const LANES: usize>([usize; LANES])
634
where
735
Self: crate::LanesAtMost64;
836

9-
impl_integer_vector! { SimdUsize, usize }
37+
impl_unsigned_vector! { SimdUsize, usize }
1038

1139
#[cfg(target_pointer_width = "32")]
1240
from_transmute_x86! { unsafe usizex4 => __m128i }
@@ -26,7 +54,7 @@ pub struct SimdU128<const LANES: usize>([u128; LANES])
2654
where
2755
Self: crate::LanesAtMost64;
2856

29-
impl_integer_vector! { SimdU128, u128 }
57+
impl_unsigned_vector! { SimdU128, u128 }
3058

3159
from_transmute_x86! { unsafe u128x2 => __m256i }
3260
//from_transmute_x86! { unsafe u128x4 => __m512i }
@@ -37,7 +65,7 @@ pub struct SimdU16<const LANES: usize>([u16; LANES])
3765
where
3866
Self: crate::LanesAtMost64;
3967

40-
impl_integer_vector! { SimdU16, u16 }
68+
impl_unsigned_vector! { SimdU16, u16 }
4169

4270
from_transmute_x86! { unsafe u16x8 => __m128i }
4371
from_transmute_x86! { unsafe u16x16 => __m256i }
@@ -49,7 +77,7 @@ pub struct SimdU32<const LANES: usize>([u32; LANES])
4977
where
5078
Self: crate::LanesAtMost64;
5179

52-
impl_integer_vector! { SimdU32, u32 }
80+
impl_unsigned_vector! { SimdU32, u32 }
5381

5482
from_transmute_x86! { unsafe u32x4 => __m128i }
5583
from_transmute_x86! { unsafe u32x8 => __m256i }
@@ -61,7 +89,7 @@ pub struct SimdU64<const LANES: usize>([u64; LANES])
6189
where
6290
Self: crate::LanesAtMost64;
6391

64-
impl_integer_vector! { SimdU64, u64 }
92+
impl_unsigned_vector! { SimdU64, u64 }
6593

6694
from_transmute_x86! { unsafe u64x2 => __m128i }
6795
from_transmute_x86! { unsafe u64x4 => __m256i }
@@ -73,7 +101,7 @@ pub struct SimdU8<const LANES: usize>([u8; LANES])
73101
where
74102
Self: crate::LanesAtMost64;
75103

76-
impl_integer_vector! { SimdU8, u8 }
104+
impl_unsigned_vector! { SimdU8, u8 }
77105

78106
from_transmute_x86! { unsafe u8x16 => __m128i }
79107
from_transmute_x86! { unsafe u8x32 => __m256i }

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