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1 parent ad73468 commit 94414acCopy full SHA for 94414ac
src/librustc/mir/mod.rs
@@ -217,7 +217,11 @@ impl<'tcx> Body<'tcx> {
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#[inline]
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pub fn unwrap_predecessors(&self) -> &IndexVec<BasicBlock, Vec<BasicBlock>> {
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- assert!(self.predecessors_cache.is_some(), "Expected predecessors_cache to be `Some(...)` for block at: {:?}", self.span.data());
+ assert!(
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+ self.predecessors_cache.is_some(),
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+ "Expected predecessors_cache to be `Some(...)` for block at: {:?}",
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+ self.span.data()
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+ );
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self.predecessors_cache.as_ref().unwrap()
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}
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