Reformat std_detect

Kobzol · Kobzol · commit b346384cd7d1 · 2025-07-04T10:08:58.000+02:00
diff --git a/library/std_detect/src/detect/cache.rs b/library/std_detect/src/detect/cache.rs
@@ -3,9 +3,7 @@
 
 #![allow(dead_code)] // not used on all platforms
 
-use core::sync::atomic::Ordering;
-
-use core::sync::atomic::AtomicUsize;
+use core::sync::atomic::{AtomicUsize, Ordering};
 
 /// Sets the `bit` of `x`.
 #[inline]
@@ -40,31 +38,22 @@ impl Initializer {
     /// Tests the `bit` of the cache.
     #[inline]
     pub(crate) fn test(self, bit: u32) -> bool {
-        debug_assert!(
-            bit < CACHE_CAPACITY,
-            "too many features, time to increase the cache size!"
-        );
+        debug_assert!(bit < CACHE_CAPACITY, "too many features, time to increase the cache size!");
         test_bit(self.0, bit)
     }
 
     /// Sets the `bit` of the cache.
     #[inline]
     pub(crate) fn set(&mut self, bit: u32) {
-        debug_assert!(
-            bit < CACHE_CAPACITY,
-            "too many features, time to increase the cache size!"
-        );
+        debug_assert!(bit < CACHE_CAPACITY, "too many features, time to increase the cache size!");
         let v = self.0;
         self.0 = set_bit(v, bit);
     }
 
     /// Unsets the `bit` of the cache.
     #[inline]
     pub(crate) fn unset(&mut self, bit: u32) {
-        debug_assert!(
-            bit < CACHE_CAPACITY,
-            "too many features, time to increase the cache size!"
-        );
+        debug_assert!(bit < CACHE_CAPACITY, "too many features, time to increase the cache size!");
         let v = self.0;
         self.0 = unset_bit(v, bit);
     }
@@ -73,11 +62,7 @@ impl Initializer {
 /// This global variable is a cache of the features supported by the CPU.
 // Note: the third slot is only used in x86
 // Another Slot can be added if needed without any change to `Initializer`
-static CACHE: [Cache; 3] = [
-    Cache::uninitialized(),
-    Cache::uninitialized(),
-    Cache::uninitialized(),
-];
+static CACHE: [Cache; 3] = [Cache::uninitialized(), Cache::uninitialized(), Cache::uninitialized()];
 
 /// Feature cache with capacity for `size_of::<usize>() * 8 - 1` features.
 ///
@@ -104,19 +89,14 @@ impl Cache {
     #[inline]
     pub(crate) fn test(&self, bit: u32) -> Option<bool> {
         let cached = self.0.load(Ordering::Relaxed);
-        if cached == 0 {
-            None
-        } else {
-            Some(test_bit(cached as u128, bit))
-        }
+        if cached == 0 { None } else { Some(test_bit(cached as u128, bit)) }
     }
 
     /// Initializes the cache.
     #[inline]
     fn initialize(&self, value: usize) -> usize {
         debug_assert_eq!((value & !Cache::MASK), 0);
-        self.0
-            .store(value | Cache::INITIALIZED_BIT, Ordering::Relaxed);
+        self.0.store(value | Cache::INITIALIZED_BIT, Ordering::Relaxed);
         value
     }
 }
@@ -217,7 +197,5 @@ pub(crate) fn test(bit: u32) -> bool {
     } else {
         (bit - 2 * Cache::CAPACITY, 2)
     };
-    CACHE[idx]
-        .test(relative_bit)
-        .unwrap_or_else(|| detect_and_initialize().test(bit))
+    CACHE[idx].test(relative_bit).unwrap_or_else(|| detect_and_initialize().test(bit))
 }
diff --git a/library/std_detect/src/detect/mod.rs b/library/std_detect/src/detect/mod.rs
@@ -29,7 +29,6 @@ mod arch;
 #[doc(hidden)]
 #[unstable(feature = "stdarch_internal", issue = "none")]
 pub use self::arch::__is_feature_detected;
-
 pub(crate) use self::arch::Feature;
 
 mod bit;
diff --git a/library/std_detect/src/detect/os/aarch64.rs b/library/std_detect/src/detect/os/aarch64.rs
@@ -17,9 +17,10 @@
 //! - [Linux documentation](https://www.kernel.org/doc/Documentation/arm64/cpu-feature-registers.txt)
 //! - [ARM documentation](https://developer.arm.com/documentation/ddi0601/2022-12/AArch64-Registers?lang=en)
 
-use crate::detect::{Feature, cache};
 use core::arch::asm;
 
+use crate::detect::{Feature, cache};
+
 /// Try to read the features from the system registers.
 ///
 /// This will cause SIGILL if the current OS is not trapping the mrs instruction.
@@ -104,10 +105,7 @@ pub(crate) fn parse_system_registers(
         let sha2 = bits_shift(aa64isar0, 15, 12) >= 1;
         enable_feature(Feature::sha2, asimd && sha1 && sha2);
         enable_feature(Feature::rdm, asimd && bits_shift(aa64isar0, 31, 28) >= 1);
-        enable_feature(
-            Feature::dotprod,
-            asimd && bits_shift(aa64isar0, 47, 44) >= 1,
-        );
+        enable_feature(Feature::dotprod, asimd && bits_shift(aa64isar0, 47, 44) >= 1);
         enable_feature(Feature::sve, asimd && bits_shift(aa64pfr0, 35, 32) >= 1);
     }
 
diff --git a/library/std_detect/src/detect/os/darwin/aarch64.rs b/library/std_detect/src/detect/os/darwin/aarch64.rs
@@ -2,9 +2,10 @@
 //!
 //! <https://developer.apple.com/documentation/kernel/1387446-sysctlbyname/determining_instruction_set_characteristics>
 
-use crate::detect::{Feature, cache};
 use core::ffi::CStr;
 
+use crate::detect::{Feature, cache};
+
 #[inline]
 fn _sysctlbyname(name: &CStr) -> bool {
     use libc;
@@ -14,13 +15,7 @@ fn _sysctlbyname(name: &CStr) -> bool {
     let enabled_ptr = &mut enabled as *mut i32 as *mut libc::c_void;
 
     let ret = unsafe {
-        libc::sysctlbyname(
-            name.as_ptr(),
-            enabled_ptr,
-            &mut enabled_len,
-            core::ptr::null_mut(),
-            0,
-        )
+        libc::sysctlbyname(name.as_ptr(), enabled_ptr, &mut enabled_len, core::ptr::null_mut(), 0)
     };
 
     match ret {
diff --git a/library/std_detect/src/detect/os/freebsd/auxvec.rs b/library/std_detect/src/detect/os/freebsd/auxvec.rs
@@ -54,11 +54,8 @@ fn archauxv(key: libc::c_int) -> usize {
         // https://github.com/freebsd/freebsd-src/blob/release/11.4.0/sys/sys/auxv.h
         // FreeBSD 11 support in std has been removed in Rust 1.75 (https://github.com/rust-lang/rust/pull/114521),
         // so we can safely use this function.
-        let res = libc::elf_aux_info(
-            key,
-            &mut out as *mut libc::c_ulong as *mut libc::c_void,
-            OUT_LEN,
-        );
+        let res =
+            libc::elf_aux_info(key, &mut out as *mut libc::c_ulong as *mut libc::c_void, OUT_LEN);
         // If elf_aux_info fails, `out` will be left at zero (which is the proper default value).
         debug_assert!(res == 0 || out == 0);
     }
diff --git a/library/std_detect/src/detect/os/linux/aarch64.rs b/library/std_detect/src/detect/os/linux/aarch64.rs
@@ -343,14 +343,8 @@ impl AtHwcap {
             enable_feature(Feature::sve2, sve2);
             enable_feature(Feature::sve2p1, self.sve2p1 && sve2);
             // SVE2 extensions require SVE2 and crypto features
-            enable_feature(
-                Feature::sve2_aes,
-                self.sveaes && self.svepmull && sve2 && self.aes,
-            );
-            enable_feature(
-                Feature::sve2_sm4,
-                self.svesm4 && sve2 && self.sm3 && self.sm4,
-            );
+            enable_feature(Feature::sve2_aes, self.sveaes && self.svepmull && sve2 && self.aes);
+            enable_feature(Feature::sve2_sm4, self.svesm4 && sve2 && self.sm3 && self.sm4);
             enable_feature(
                 Feature::sve2_sha3,
                 self.svesha3 && sve2 && self.sha512 && self.sha3 && self.sha1 && self.sha2,
diff --git a/library/std_detect/src/detect/os/linux/loongarch.rs b/library/std_detect/src/detect/os/linux/loongarch.rs
@@ -1,8 +1,9 @@
 //! Run-time feature detection for LoongArch on Linux.
 
+use core::arch::asm;
+
 use super::auxvec;
 use crate::detect::{Feature, bit, cache};
-use core::arch::asm;
 
 /// Try to read the features from the auxiliary vector.
 pub(crate) fn detect_features() -> cache::Initializer {
@@ -43,16 +44,8 @@ pub(crate) fn detect_features() -> cache::Initializer {
     //
     // [hwcap]: https://github.com/torvalds/linux/blob/master/arch/loongarch/include/uapi/asm/hwcap.h
     if let Ok(auxv) = auxvec::auxv() {
-        enable_feature(
-            &mut value,
-            Feature::f,
-            bit::test(cpucfg2, 1) && bit::test(auxv.hwcap, 3),
-        );
-        enable_feature(
-            &mut value,
-            Feature::d,
-            bit::test(cpucfg2, 2) && bit::test(auxv.hwcap, 3),
-        );
+        enable_feature(&mut value, Feature::f, bit::test(cpucfg2, 1) && bit::test(auxv.hwcap, 3));
+        enable_feature(&mut value, Feature::d, bit::test(cpucfg2, 2) && bit::test(auxv.hwcap, 3));
         enable_feature(&mut value, Feature::lsx, bit::test(auxv.hwcap, 4));
         enable_feature(&mut value, Feature::lasx, bit::test(auxv.hwcap, 5));
         enable_feature(
diff --git a/library/std_detect/src/detect/os/linux/riscv.rs b/library/std_detect/src/detect/os/linux/riscv.rs
@@ -112,16 +112,7 @@ fn _riscv_hwprobe(out: &mut [riscv_hwprobe]) -> bool {
         cpus: *mut libc::c_ulong,
         flags: libc::c_uint,
     ) -> libc::c_long {
-        unsafe {
-            libc::syscall(
-                __NR_riscv_hwprobe,
-                pairs,
-                pair_count,
-                cpu_set_size,
-                cpus,
-                flags,
-            )
-        }
+        unsafe { libc::syscall(__NR_riscv_hwprobe, pairs, pair_count, cpu_set_size, cpus, flags) }
     }
 
     let len = out.len();
@@ -157,26 +148,11 @@ pub(crate) fn detect_features() -> cache::Initializer {
     // performance-related capabilities.
     'hwprobe: {
         let mut out = [
-            riscv_hwprobe {
-                key: RISCV_HWPROBE_KEY_BASE_BEHAVIOR,
-                value: 0,
-            },
-            riscv_hwprobe {
-                key: RISCV_HWPROBE_KEY_IMA_EXT_0,
-                value: 0,
-            },
-            riscv_hwprobe {
-                key: RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF,
-                value: 0,
-            },
-            riscv_hwprobe {
-                key: RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF,
-                value: 0,
-            },
-            riscv_hwprobe {
-                key: RISCV_HWPROBE_KEY_CPUPERF_0,
-                value: 0,
-            },
+            riscv_hwprobe { key: RISCV_HWPROBE_KEY_BASE_BEHAVIOR, value: 0 },
+            riscv_hwprobe { key: RISCV_HWPROBE_KEY_IMA_EXT_0, value: 0 },
+            riscv_hwprobe { key: RISCV_HWPROBE_KEY_MISALIGNED_SCALAR_PERF, value: 0 },
+            riscv_hwprobe { key: RISCV_HWPROBE_KEY_MISALIGNED_VECTOR_PERF, value: 0 },
+            riscv_hwprobe { key: RISCV_HWPROBE_KEY_CPUPERF_0, value: 0 },
         ];
         if !_riscv_hwprobe(&mut out) {
             break 'hwprobe;
diff --git a/library/std_detect/src/detect/os/openbsd/aarch64.rs b/library/std_detect/src/detect/os/openbsd/aarch64.rs
@@ -4,8 +4,10 @@
 //! https://github.com/openbsd/src/commit/d335af936b9d7dd9cf655cae1ce19560c45de6c8
 //! https://github.com/golang/go/commit/cd54ef1f61945459486e9eea2f016d99ef1da925
 
+use core::mem::MaybeUninit;
+use core::ptr;
+
 use crate::detect::cache;
-use core::{mem::MaybeUninit, ptr};
 
 // Defined in machine/cpu.h.
 // https://github.com/openbsd/src/blob/72ccc03bd11da614f31f7ff76e3f6fce99bc1c79/sys/arch/arm64/include/cpu.h#L25-L40
diff --git a/library/std_detect/src/detect/os/x86.rs b/library/std_detect/src/detect/os/x86.rs
@@ -4,7 +4,6 @@
 use core::arch::x86::*;
 #[cfg(target_arch = "x86_64")]
 use core::arch::x86_64::*;
-
 use core::mem;
 
 use crate::detect::{Feature, bit, cache};
@@ -42,12 +41,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
     // 0x8000_0000]. - The vendor ID is stored in 12 u8 ascii chars,
     // returned in EBX, EDX, and   ECX (in that order):
     let (max_basic_leaf, vendor_id) = unsafe {
-        let CpuidResult {
-            eax: max_basic_leaf,
-            ebx,
-            ecx,
-            edx,
-        } = __cpuid(0);
+        let CpuidResult { eax: max_basic_leaf, ebx, ecx, edx } = __cpuid(0);
         let vendor_id: [[u8; 4]; 3] = [ebx.to_ne_bytes(), edx.to_ne_bytes(), ecx.to_ne_bytes()];
         let vendor_id: [u8; 12] = mem::transmute(vendor_id);
         (max_basic_leaf, vendor_id)
@@ -60,11 +54,8 @@ pub(crate) fn detect_features() -> cache::Initializer {
 
     // EAX = 1, ECX = 0: Queries "Processor Info and Feature Bits";
     // Contains information about most x86 features.
-    let CpuidResult {
-        ecx: proc_info_ecx,
-        edx: proc_info_edx,
-        ..
-    } = unsafe { __cpuid(0x0000_0001_u32) };
+    let CpuidResult { ecx: proc_info_ecx, edx: proc_info_edx, .. } =
+        unsafe { __cpuid(0x0000_0001_u32) };
 
     // EAX = 7: Queries "Extended Features";
     // Contains information about bmi,bmi2, and avx2 support.
@@ -76,11 +67,8 @@ pub(crate) fn detect_features() -> cache::Initializer {
         extended_features_edx_leaf_1,
     ) = if max_basic_leaf >= 7 {
         let CpuidResult { ebx, ecx, edx, .. } = unsafe { __cpuid(0x0000_0007_u32) };
-        let CpuidResult {
-            eax: eax_1,
-            edx: edx_1,
-            ..
-        } = unsafe { __cpuid_count(0x0000_0007_u32, 0x0000_0001_u32) };
+        let CpuidResult { eax: eax_1, edx: edx_1, .. } =
+            unsafe { __cpuid_count(0x0000_0007_u32, 0x0000_0001_u32) };
         (ebx, ecx, edx, eax_1, edx_1)
     } else {
         (0, 0, 0, 0, 0) // CPUID does not support "Extended Features"
@@ -89,10 +77,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
     // EAX = 0x8000_0000, ECX = 0: Get Highest Extended Function Supported
     // - EAX returns the max leaf value for extended information, that is,
     // `cpuid` calls in range [0x8000_0000; u32::MAX]:
-    let CpuidResult {
-        eax: extended_max_basic_leaf,
-        ..
-    } = unsafe { __cpuid(0x8000_0000_u32) };
+    let CpuidResult { eax: extended_max_basic_leaf, .. } = unsafe { __cpuid(0x8000_0000_u32) };
 
     // EAX = 0x8000_0001, ECX=0: Queries "Extended Processor Info and Feature
     // Bits"
@@ -208,10 +193,8 @@ pub(crate) fn detect_features() -> cache::Initializer {
                     // Processor Extended State Enumeration Sub-leaf (EAX = 0DH,
                     // ECX = 1):
                     if max_basic_leaf >= 0xd {
-                        let CpuidResult {
-                            eax: proc_extended_state1_eax,
-                            ..
-                        } = unsafe { __cpuid_count(0xd_u32, 1) };
+                        let CpuidResult { eax: proc_extended_state1_eax, .. } =
+                            unsafe { __cpuid_count(0xd_u32, 1) };
                         enable(proc_extended_state1_eax, 0, Feature::xsaveopt);
                         enable(proc_extended_state1_eax, 1, Feature::xsavec);
                         enable(proc_extended_state1_eax, 3, Feature::xsaves);
@@ -269,10 +252,8 @@ pub(crate) fn detect_features() -> cache::Initializer {
                     enable(extended_features_edx_leaf_1, 8, Feature::amx_complex);
 
                     if max_basic_leaf >= 0x1e {
-                        let CpuidResult {
-                            eax: amx_feature_flags_eax,
-                            ..
-                        } = unsafe { __cpuid_count(0x1e_u32, 1) };
+                        let CpuidResult { eax: amx_feature_flags_eax, .. } =
+                            unsafe { __cpuid_count(0x1e_u32, 1) };
 
                         enable(amx_feature_flags_eax, 4, Feature::amx_fp8);
                         enable(amx_feature_flags_eax, 5, Feature::amx_transpose);
diff --git a/library/std_detect/tests/cpu-detection.rs b/library/std_detect/tests/cpu-detection.rs
diff --git a/library/std_detect/tests/macro_trailing_commas.rs b/library/std_detect/tests/macro_trailing_commas.rs
diff --git a/library/std_detect/tests/x86-specific.rs b/library/std_detect/tests/x86-specific.rs
