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loongarch: Mark partial basic intrinsics as safe
1 parent 2aaa584 commit b57ff35

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2 files changed

+41
-44
lines changed
  • library/stdarch/crates/core_arch/src

2 files changed

+41
-44
lines changed

library/stdarch/crates/core_arch/src/loongarch64/mod.rs

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -13,10 +13,9 @@ use crate::arch::asm;
1313
/// Reads the 64-bit stable counter value and the counter ID
1414
#[inline]
1515
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
16-
pub unsafe fn rdtime_d() -> (i64, isize) {
17-
let val: i64;
18-
let tid: isize;
19-
asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
16+
pub fn rdtime_d() -> (i64, isize) {
17+
let (val, tid): (i64, isize);
18+
unsafe { asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) };
2019
(val, tid)
2120
}
2221

@@ -51,15 +50,15 @@ unsafe extern "unadjusted" {
5150
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
5251
#[inline]
5352
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
54-
pub unsafe fn crc_w_d_w(a: i64, b: i32) -> i32 {
55-
__crc_w_d_w(a, b)
53+
pub fn crc_w_d_w(a: i64, b: i32) -> i32 {
54+
unsafe { __crc_w_d_w(a, b) }
5655
}
5756

5857
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
5958
#[inline]
6059
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
61-
pub unsafe fn crcc_w_d_w(a: i64, b: i32) -> i32 {
62-
__crcc_w_d_w(a, b)
60+
pub fn crcc_w_d_w(a: i64, b: i32) -> i32 {
61+
unsafe { __crcc_w_d_w(a, b) }
6362
}
6463

6564
/// Generates the cache operation instruction

library/stdarch/crates/core_arch/src/loongarch_shared/mod.rs

Lines changed: 34 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -5,20 +5,18 @@ use crate::arch::asm;
55
/// Reads the lower 32-bit stable counter value and the counter ID
66
#[inline]
77
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
8-
pub unsafe fn rdtimel_w() -> (i32, isize) {
9-
let val: i32;
10-
let tid: isize;
11-
asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
8+
pub fn rdtimel_w() -> (i32, isize) {
9+
let (val, tid): (i32, isize);
10+
unsafe { asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) };
1211
(val, tid)
1312
}
1413

1514
/// Reads the upper 32-bit stable counter value and the counter ID
1615
#[inline]
1716
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
18-
pub unsafe fn rdtimeh_w() -> (i32, isize) {
19-
let val: i32;
20-
let tid: isize;
21-
asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
17+
pub fn rdtimeh_w() -> (i32, isize) {
18+
let (val, tid): (i32, isize);
19+
unsafe { asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack)) };
2220
(val, tid)
2321
}
2422

@@ -75,59 +73,59 @@ unsafe extern "unadjusted" {
7573
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
7674
#[inline]
7775
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
78-
pub unsafe fn crc_w_b_w(a: i32, b: i32) -> i32 {
79-
__crc_w_b_w(a, b)
76+
pub fn crc_w_b_w(a: i32, b: i32) -> i32 {
77+
unsafe { __crc_w_b_w(a, b) }
8078
}
8179

8280
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
8381
#[inline]
8482
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
85-
pub unsafe fn crc_w_h_w(a: i32, b: i32) -> i32 {
86-
__crc_w_h_w(a, b)
83+
pub fn crc_w_h_w(a: i32, b: i32) -> i32 {
84+
unsafe { __crc_w_h_w(a, b) }
8785
}
8886

8987
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
9088
#[inline]
9189
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
92-
pub unsafe fn crc_w_w_w(a: i32, b: i32) -> i32 {
93-
__crc_w_w_w(a, b)
90+
pub fn crc_w_w_w(a: i32, b: i32) -> i32 {
91+
unsafe { __crc_w_w_w(a, b) }
9492
}
9593

9694
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
9795
#[inline]
9896
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
99-
pub unsafe fn crcc_w_b_w(a: i32, b: i32) -> i32 {
100-
__crcc_w_b_w(a, b)
97+
pub fn crcc_w_b_w(a: i32, b: i32) -> i32 {
98+
unsafe { __crcc_w_b_w(a, b) }
10199
}
102100

103101
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
104102
#[inline]
105103
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
106-
pub unsafe fn crcc_w_h_w(a: i32, b: i32) -> i32 {
107-
__crcc_w_h_w(a, b)
104+
pub fn crcc_w_h_w(a: i32, b: i32) -> i32 {
105+
unsafe { __crcc_w_h_w(a, b) }
108106
}
109107

110108
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
111109
#[inline]
112110
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
113-
pub unsafe fn crcc_w_w_w(a: i32, b: i32) -> i32 {
114-
__crcc_w_w_w(a, b)
111+
pub fn crcc_w_w_w(a: i32, b: i32) -> i32 {
112+
unsafe { __crcc_w_w_w(a, b) }
115113
}
116114

117115
/// Generates the memory barrier instruction
118116
#[inline]
119117
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
120-
pub unsafe fn dbar<const IMM15: i32>() {
118+
pub fn dbar<const IMM15: i32>() {
121119
static_assert_uimm_bits!(IMM15, 15);
122-
__dbar(IMM15);
120+
unsafe { __dbar(IMM15) };
123121
}
124122

125123
/// Generates the instruction-fetch barrier instruction
126124
#[inline]
127125
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
128-
pub unsafe fn ibar<const IMM15: i32>() {
126+
pub fn ibar<const IMM15: i32>() {
129127
static_assert_uimm_bits!(IMM15, 15);
130-
__ibar(IMM15);
128+
unsafe { __ibar(IMM15) };
131129
}
132130

133131
/// Moves data from a GPR to the FCSR
@@ -141,9 +139,9 @@ pub unsafe fn movgr2fcsr<const IMM5: i32>(a: i32) {
141139
/// Moves data from a FCSR to the GPR
142140
#[inline]
143141
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
144-
pub unsafe fn movfcsr2gr<const IMM5: i32>() -> i32 {
142+
pub fn movfcsr2gr<const IMM5: i32>() -> i32 {
145143
static_assert_uimm_bits!(IMM5, 5);
146-
__movfcsr2gr(IMM5)
144+
unsafe { __movfcsr2gr(IMM5) }
147145
}
148146

149147
/// Reads the 8-bit IO-CSR
@@ -199,8 +197,8 @@ pub unsafe fn brk<const IMM15: i32>() {
199197
/// Reads the CPU configuration register
200198
#[inline]
201199
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
202-
pub unsafe fn cpucfg(a: i32) -> i32 {
203-
__cpucfg(a)
200+
pub fn cpucfg(a: i32) -> i32 {
201+
unsafe { __cpucfg(a) }
204202
}
205203

206204
/// Generates the syscall instruction
@@ -215,30 +213,30 @@ pub unsafe fn syscall<const IMM15: i32>() {
215213
#[inline]
216214
#[target_feature(enable = "frecipe")]
217215
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
218-
pub unsafe fn frecipe_s(a: f32) -> f32 {
219-
__frecipe_s(a)
216+
pub fn frecipe_s(a: f32) -> f32 {
217+
unsafe { __frecipe_s(a) }
220218
}
221219

222220
/// Calculate the approximate double-precision result of 1.0 divided
223221
#[inline]
224222
#[target_feature(enable = "frecipe")]
225223
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
226-
pub unsafe fn frecipe_d(a: f64) -> f64 {
227-
__frecipe_d(a)
224+
pub fn frecipe_d(a: f64) -> f64 {
225+
unsafe { __frecipe_d(a) }
228226
}
229227

230228
/// Calculate the approximate single-precision result of dividing 1.0 by the square root
231229
#[inline]
232230
#[target_feature(enable = "frecipe")]
233231
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
234-
pub unsafe fn frsqrte_s(a: f32) -> f32 {
235-
__frsqrte_s(a)
232+
pub fn frsqrte_s(a: f32) -> f32 {
233+
unsafe { __frsqrte_s(a) }
236234
}
237235

238236
/// Calculate the approximate double-precision result of dividing 1.0 by the square root
239237
#[inline]
240238
#[target_feature(enable = "frecipe")]
241239
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
242-
pub unsafe fn frsqrte_d(a: f64) -> f64 {
243-
__frsqrte_d(a)
240+
pub fn frsqrte_d(a: f64) -> f64 {
241+
unsafe { __frsqrte_d(a) }
244242
}

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