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bjorn3bjorn3
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Slightly simplify some macros by removing an extra case for when signedness doesn't matter
This is slightly more verbose when invoking the macro.
1 parent 78e2d4a commit d4d2b24

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+60
-86
lines changed

1 file changed

+60
-86
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‎src/intrinsics/simd.rs

Lines changed: 60 additions & 86 deletions
Original file line numberDiff line numberDiff line change
@@ -15,90 +15,64 @@ fn validate_simd_type(fx: &mut FunctionCx<'_, '_, '_>, intrinsic: Symbol, span:
1515
}
1616
}
1717

18-
macro simd_cmp {
19-
($fx:expr, $cc:ident|$cc_f:ident($x:ident, $y:ident) -> $ret:ident) => {
20-
// FIXME use vector icmp when possible
21-
simd_pair_for_each_lane(
22-
$fx,
23-
$x,
24-
$y,
25-
$ret,
26-
|fx, lane_layout, res_lane_layout, x_lane, y_lane| {
27-
let res_lane = match lane_layout.ty.kind() {
28-
ty::Uint(_) | ty::Int(_) => fx.bcx.ins().icmp(IntCC::$cc, x_lane, y_lane),
29-
ty::Float(_) => fx.bcx.ins().fcmp(FloatCC::$cc_f, x_lane, y_lane),
30-
_ => unreachable!("{:?}", lane_layout.ty),
31-
};
32-
bool_to_zero_or_max_uint(fx, res_lane_layout, res_lane)
33-
},
34-
);
35-
},
36-
($fx:expr, $cc_u:ident|$cc_s:ident|$cc_f:ident($x:ident, $y:ident) -> $ret:ident) => {
37-
// FIXME use vector icmp when possible
38-
simd_pair_for_each_lane(
39-
$fx,
40-
$x,
41-
$y,
42-
$ret,
43-
|fx, lane_layout, res_lane_layout, x_lane, y_lane| {
44-
let res_lane = match lane_layout.ty.kind() {
45-
ty::Uint(_) => fx.bcx.ins().icmp(IntCC::$cc_u, x_lane, y_lane),
46-
ty::Int(_) => fx.bcx.ins().icmp(IntCC::$cc_s, x_lane, y_lane),
47-
ty::Float(_) => fx.bcx.ins().fcmp(FloatCC::$cc_f, x_lane, y_lane),
48-
_ => unreachable!("{:?}", lane_layout.ty),
49-
};
50-
bool_to_zero_or_max_uint(fx, res_lane_layout, res_lane)
51-
},
52-
);
53-
},
18+
macro simd_cmp($fx:expr, $cc_u:ident|$cc_s:ident|$cc_f:ident($x:ident, $y:ident) -> $ret:ident) {
19+
// FIXME use vector instructions when possible
20+
simd_pair_for_each_lane(
21+
$fx,
22+
$x,
23+
$y,
24+
$ret,
25+
|fx, lane_layout, res_lane_layout, x_lane, y_lane| {
26+
let res_lane = match lane_layout.ty.kind() {
27+
ty::Uint(_) => fx.bcx.ins().icmp(IntCC::$cc_u, x_lane, y_lane),
28+
ty::Int(_) => fx.bcx.ins().icmp(IntCC::$cc_s, x_lane, y_lane),
29+
ty::Float(_) => fx.bcx.ins().fcmp(FloatCC::$cc_f, x_lane, y_lane),
30+
_ => unreachable!("{:?}", lane_layout.ty),
31+
};
32+
bool_to_zero_or_max_uint(fx, res_lane_layout, res_lane)
33+
},
34+
);
5435
}
5536

56-
macro simd_int_binop {
57-
($fx:expr, $op:ident($x:ident, $y:ident) -> $ret:ident) => {
58-
simd_int_binop!($fx, $op|$op($x, $y) -> $ret);
59-
},
60-
($fx:expr, $op_u:ident|$op_s:ident($x:ident, $y:ident) -> $ret:ident) => {
61-
simd_pair_for_each_lane(
62-
$fx,
63-
$x,
64-
$y,
65-
$ret,
66-
|fx, lane_layout, ret_lane_layout, x_lane, y_lane| {
67-
let res_lane = match lane_layout.ty.kind() {
68-
ty::Uint(_) => fx.bcx.ins().$op_u(x_lane, y_lane),
69-
ty::Int(_) => fx.bcx.ins().$op_s(x_lane, y_lane),
70-
_ => unreachable!("{:?}", lane_layout.ty),
71-
};
72-
CValue::by_val(res_lane, ret_lane_layout)
73-
},
74-
);
75-
},
37+
macro simd_int_binop($fx:expr, $op_u:ident|$op_s:ident($x:ident, $y:ident) -> $ret:ident) {
38+
// FIXME use vector instructions when possible
39+
simd_pair_for_each_lane(
40+
$fx,
41+
$x,
42+
$y,
43+
$ret,
44+
|fx, lane_layout, ret_lane_layout, x_lane, y_lane| {
45+
let res_lane = match lane_layout.ty.kind() {
46+
ty::Uint(_) => fx.bcx.ins().$op_u(x_lane, y_lane),
47+
ty::Int(_) => fx.bcx.ins().$op_s(x_lane, y_lane),
48+
_ => unreachable!("{:?}", lane_layout.ty),
49+
};
50+
CValue::by_val(res_lane, ret_lane_layout)
51+
},
52+
);
7653
}
7754

78-
macro simd_int_flt_binop {
79-
($fx:expr, $op:ident|$op_f:ident($x:ident, $y:ident) -> $ret:ident) => {
80-
simd_int_flt_binop!($fx, $op|$op|$op_f($x, $y) -> $ret);
81-
},
82-
($fx:expr, $op_u:ident|$op_s:ident|$op_f:ident($x:ident, $y:ident) -> $ret:ident) => {
83-
simd_pair_for_each_lane(
84-
$fx,
85-
$x,
86-
$y,
87-
$ret,
88-
|fx, lane_layout, ret_lane_layout, x_lane, y_lane| {
89-
let res_lane = match lane_layout.ty.kind() {
90-
ty::Uint(_) => fx.bcx.ins().$op_u(x_lane, y_lane),
91-
ty::Int(_) => fx.bcx.ins().$op_s(x_lane, y_lane),
92-
ty::Float(_) => fx.bcx.ins().$op_f(x_lane, y_lane),
93-
_ => unreachable!("{:?}", lane_layout.ty),
94-
};
95-
CValue::by_val(res_lane, ret_lane_layout)
96-
},
97-
);
98-
},
55+
macro simd_int_flt_binop($fx:expr, $op_u:ident|$op_s:ident|$op_f:ident($x:ident, $y:ident) -> $ret:ident) {
56+
// FIXME use vector instructions when possible
57+
simd_pair_for_each_lane(
58+
$fx,
59+
$x,
60+
$y,
61+
$ret,
62+
|fx, lane_layout, ret_lane_layout, x_lane, y_lane| {
63+
let res_lane = match lane_layout.ty.kind() {
64+
ty::Uint(_) => fx.bcx.ins().$op_u(x_lane, y_lane),
65+
ty::Int(_) => fx.bcx.ins().$op_s(x_lane, y_lane),
66+
ty::Float(_) => fx.bcx.ins().$op_f(x_lane, y_lane),
67+
_ => unreachable!("{:?}", lane_layout.ty),
68+
};
69+
CValue::by_val(res_lane, ret_lane_layout)
70+
},
71+
);
9972
}
10073

10174
macro simd_flt_binop($fx:expr, $op:ident($x:ident, $y:ident) -> $ret:ident) {
75+
// FIXME use vector instructions when possible
10276
simd_pair_for_each_lane(
10377
$fx,
10478
$x,
@@ -143,11 +117,11 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
143117

144118
simd_eq, (c x, c y) {
145119
validate_simd_type(fx, intrinsic, span, x.layout().ty);
146-
simd_cmp!(fx, Equal|Equal(x, y) -> ret);
120+
simd_cmp!(fx, Equal|Equal|Equal(x, y) -> ret);
147121
};
148122
simd_ne, (c x, c y) {
149123
validate_simd_type(fx, intrinsic, span, x.layout().ty);
150-
simd_cmp!(fx, NotEqual|NotEqual(x, y) -> ret);
124+
simd_cmp!(fx, NotEqual|NotEqual|NotEqual(x, y) -> ret);
151125
};
152126
simd_lt, (c x, c y) {
153127
validate_simd_type(fx, intrinsic, span, x.layout().ty);
@@ -331,15 +305,15 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
331305

332306
simd_add, (c x, c y) {
333307
validate_simd_type(fx, intrinsic, span, x.layout().ty);
334-
simd_int_flt_binop!(fx, iadd|fadd(x, y) -> ret);
308+
simd_int_flt_binop!(fx, iadd|iadd|fadd(x, y) -> ret);
335309
};
336310
simd_sub, (c x, c y) {
337311
validate_simd_type(fx, intrinsic, span, x.layout().ty);
338-
simd_int_flt_binop!(fx, isub|fsub(x, y) -> ret);
312+
simd_int_flt_binop!(fx, isub|isub|fsub(x, y) -> ret);
339313
};
340314
simd_mul, (c x, c y) {
341315
validate_simd_type(fx, intrinsic, span, x.layout().ty);
342-
simd_int_flt_binop!(fx, imul|fmul(x, y) -> ret);
316+
simd_int_flt_binop!(fx, imul|imul|fmul(x, y) -> ret);
343317
};
344318
simd_div, (c x, c y) {
345319
validate_simd_type(fx, intrinsic, span, x.layout().ty);
@@ -370,23 +344,23 @@ pub(super) fn codegen_simd_intrinsic_call<'tcx>(
370344
};
371345
simd_shl, (c x, c y) {
372346
validate_simd_type(fx, intrinsic, span, x.layout().ty);
373-
simd_int_binop!(fx, ishl(x, y) -> ret);
347+
simd_int_binop!(fx, ishl|ishl(x, y) -> ret);
374348
};
375349
simd_shr, (c x, c y) {
376350
validate_simd_type(fx, intrinsic, span, x.layout().ty);
377351
simd_int_binop!(fx, ushr|sshr(x, y) -> ret);
378352
};
379353
simd_and, (c x, c y) {
380354
validate_simd_type(fx, intrinsic, span, x.layout().ty);
381-
simd_int_binop!(fx, band(x, y) -> ret);
355+
simd_int_binop!(fx, band|band(x, y) -> ret);
382356
};
383357
simd_or, (c x, c y) {
384358
validate_simd_type(fx, intrinsic, span, x.layout().ty);
385-
simd_int_binop!(fx, bor(x, y) -> ret);
359+
simd_int_binop!(fx, bor|bor(x, y) -> ret);
386360
};
387361
simd_xor, (c x, c y) {
388362
validate_simd_type(fx, intrinsic, span, x.layout().ty);
389-
simd_int_binop!(fx, bxor(x, y) -> ret);
363+
simd_int_binop!(fx, bxor|bxor(x, y) -> ret);
390364
};
391365

392366
simd_fma, (c a, c b, c c) {

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