rename rust_abi → rustc_abi

Author: RalfJung

compiler/rustc_target/src/callconv/mod.rs

@@ -10,7 +10,7 @@ use crate::abi::{
     TyAndLayout,
 };
 use crate::spec::abi::Abi as SpecAbi;
-use crate::spec::{self, HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, RustAbi, WasmCAbi};
+use crate::spec::{self, HasTargetSpec, HasWasmCAbiOpt, HasX86AbiOpt, RustcAbi, WasmCAbi};
 
 mod aarch64;
 mod amdgpu;
@@ -755,8 +755,8 @@ impl<'a, Ty> FnAbi<'a, Ty> {
         let can_pass_simd_directly = |arg: &ArgAbi<'_, Ty>| match &*spec.arch {
             // On x86, if we have SSE2 (which we have by default for x86_64), we can always pass up
             // to 128-bit-sized vectors.
-            "x86" if spec.rust_abi == Some(RustAbi::X86Sse2) => arg.layout.size.bits() <= 128,
-            "x86_64" if spec.rust_abi != Some(RustAbi::X86Softfloat) => {
+            "x86" if spec.rustc_abi == Some(RustcAbi::X86Sse2) => arg.layout.size.bits() <= 128,
+            "x86_64" if spec.rustc_abi != Some(RustcAbi::X86Softfloat) => {
                 arg.layout.size.bits() <= 128
             }
             // So far, we haven't implemented this logic for any other target.

compiler/rustc_target/src/callconv/x86.rs

@@ -3,7 +3,7 @@ use crate::abi::{
     AddressSpace, Align, BackendRepr, Float, HasDataLayout, Pointer, TyAbiInterface, TyAndLayout,
 };
 use crate::spec::abi::Abi as SpecAbi;
-use crate::spec::{HasTargetSpec, RustAbi};
+use crate::spec::{HasTargetSpec, RustcAbi};
 
 #[derive(PartialEq)]
 pub(crate) enum Flavor {
@@ -234,7 +234,7 @@ where
             _ => false, // anyway not passed via registers on x86
         };
         if has_float {
-            if cx.target_spec().rust_abi == Some(RustAbi::X86Sse2)
+            if cx.target_spec().rustc_abi == Some(RustcAbi::X86Sse2)
                 && fn_abi.ret.layout.backend_repr.is_scalar()
                 && fn_abi.ret.layout.size.bits() <= 128
             {

compiler/rustc_target/src/spec/base/apple/mod.rs

@@ -2,7 +2,7 @@ use std::borrow::Cow;
 use std::env;
 
 use crate::spec::{
-    Cc, DebuginfoKind, FloatAbi, FramePointer, LinkerFlavor, Lld, RustAbi, SplitDebuginfo,
+    Cc, DebuginfoKind, FloatAbi, FramePointer, LinkerFlavor, Lld, RustcAbi, SplitDebuginfo,
     StackProbeType, StaticCow, TargetOptions, cvs,
 };
 
@@ -156,7 +156,7 @@ pub(crate) fn base(
     };
     if matches!(arch, Arch::I386 | Arch::I686) {
         // All Apple x86-32 targets have SSE2.
-        opts.rust_abi = Some(RustAbi::X86Sse2);
+        opts.rustc_abi = Some(RustcAbi::X86Sse2);
     }
     (opts, unversioned_llvm_target(os, arch, abi), arch.target_arch())
 }

compiler/rustc_target/src/spec/json.rs

@@ -128,11 +128,11 @@ impl Target {
                     Some(Ok(()))
                 })).unwrap_or(Ok(()))
             } );
-            ($key_name:ident, RustAbi) => ( {
+            ($key_name:ident, RustcAbi) => ( {
                 let name = (stringify!($key_name)).replace("_", "-");
                 obj.remove(&name).and_then(|o| o.as_str().and_then(|s| {
-                    match s.parse::<super::RustAbi>() {
-                        Ok(rust_abi) => base.$key_name = Some(rust_abi),
+                    match s.parse::<super::RustcAbi>() {
+                        Ok(rustc_abi) => base.$key_name = Some(rustc_abi),
                         _ => return Some(Err(format!(
                             "'{s}' is not a valid value for rust-abi. \
                             Use 'x86-softfloat' or 'x86-sse2'."
@@ -624,7 +624,7 @@ impl Target {
         key!(llvm_mcount_intrinsic, optional);
         key!(llvm_abiname);
         key!(llvm_floatabi, FloatAbi)?;
-        key!(rust_abi, RustAbi)?;
+        key!(rustc_abi, RustcAbi)?;
         key!(relax_elf_relocations, bool);
         key!(llvm_args, list);
         key!(use_ctors_section, bool);
@@ -800,7 +800,7 @@ impl ToJson for Target {
         target_option_val!(llvm_mcount_intrinsic);
         target_option_val!(llvm_abiname);
         target_option_val!(llvm_floatabi);
-        target_option_val!(rust_abi);
+        target_option_val!(rustc_abi);
         target_option_val!(relax_elf_relocations);
         target_option_val!(llvm_args);
         target_option_val!(use_ctors_section);

compiler/rustc_target/src/spec/mod.rs

@@ -1114,32 +1114,32 @@ impl ToJson for FloatAbi {
     }
 }
 
-/// The Rust-specific variant of the ABI used for this target.
+/// The Rustc-specific variant of the ABI used for this target.
 #[derive(Clone, Copy, PartialEq, Hash, Debug)]
-pub enum RustAbi {
+pub enum RustcAbi {
     /// On x86-32 only: make use of SSE and SSE2 for ABI purposes.
     X86Sse2,
     /// On x86-32/64 only: do not use any FPU or SIMD registers for the ABI/
     X86Softfloat,
 }
 
-impl FromStr for RustAbi {
+impl FromStr for RustcAbi {
     type Err = ();
 
-    fn from_str(s: &str) -> Result<RustAbi, ()> {
+    fn from_str(s: &str) -> Result<RustcAbi, ()> {
         Ok(match s {
-            "x86-sse2" => RustAbi::X86Sse2,
-            "x86-softfloat" => RustAbi::X86Softfloat,
+            "x86-sse2" => RustcAbi::X86Sse2,
+            "x86-softfloat" => RustcAbi::X86Softfloat,
             _ => return Err(()),
         })
     }
 }
 
-impl ToJson for RustAbi {
+impl ToJson for RustcAbi {
     fn to_json(&self) -> Json {
         match *self {
-            RustAbi::X86Sse2 => "x86-sse2",
-            RustAbi::X86Softfloat => "x86-softfloat",
+            RustcAbi::X86Sse2 => "x86-sse2",
+            RustcAbi::X86Softfloat => "x86-softfloat",
         }
         .to_json()
     }
@@ -2528,7 +2528,7 @@ pub struct TargetOptions {
     /// it can also affect "C" ABI functions; the point is that this flag is interpreted by
     /// rustc and not forwarded to LLVM.
     /// So far, this is only used on x86.
-    pub rust_abi: Option<RustAbi>,
+    pub rustc_abi: Option<RustcAbi>,
 
     /// Whether or not RelaxElfRelocation flag will be passed to the linker
     pub relax_elf_relocations: bool,
@@ -2794,7 +2794,7 @@ impl Default for TargetOptions {
             llvm_mcount_intrinsic: None,
             llvm_abiname: "".into(),
             llvm_floatabi: None,
-            rust_abi: None,
+            rustc_abi: None,
             relax_elf_relocations: false,
             llvm_args: cvs![],
             use_ctors_section: false,
@@ -3256,14 +3256,14 @@ impl Target {
         }
 
         // Check consistency of Rust ABI declaration.
-        if let Some(rust_abi) = self.rust_abi {
+        if let Some(rust_abi) = self.rustc_abi {
             match rust_abi {
-                RustAbi::X86Sse2 => check_matches!(
+                RustcAbi::X86Sse2 => check_matches!(
                     &*self.arch,
                     "x86",
                     "`x86-sse2` ABI is only valid for x86-32 targets"
                 ),
-                RustAbi::X86Softfloat => check_matches!(
+                RustcAbi::X86Softfloat => check_matches!(
                     &*self.arch,
                     "x86" | "x86_64",
                     "`x86-softfloat` ABI is only valid for x86 targets"

compiler/rustc_target/src/spec/targets/i586_pc_nto_qnx700.rs

@@ -1,4 +1,4 @@
-use crate::spec::{Cc, LinkerFlavor, Lld, RustAbi, StackProbeType, Target, TargetOptions, base};
+use crate::spec::{Cc, LinkerFlavor, Lld, RustcAbi, StackProbeType, Target, TargetOptions, base};
 
 pub(crate) fn target() -> Target {
     Target {
@@ -15,7 +15,7 @@ pub(crate) fn target() -> Target {
             .into(),
         arch: "x86".into(),
         options: TargetOptions {
-            rust_abi: Some(RustAbi::X86Sse2),
+            rustc_abi: Some(RustcAbi::X86Sse2),
             cpu: "pentium4".into(),
             max_atomic_width: Some(64),
             pre_link_args: TargetOptions::link_args(LinkerFlavor::Gnu(Cc::Yes, Lld::No), &[

compiler/rustc_target/src/spec/targets/i586_unknown_linux_gnu.rs

@@ -2,7 +2,7 @@ use crate::spec::Target;
 
 pub(crate) fn target() -> Target {
     let mut base = super::i686_unknown_linux_gnu::target();
-    base.rust_abi = None;
+    base.rustc_abi = None;
     base.cpu = "pentium".into();
     base.llvm_target = "i586-unknown-linux-gnu".into();
     base

compiler/rustc_target/src/spec/targets/i586_unknown_linux_musl.rs

@@ -2,7 +2,7 @@ use crate::spec::Target;
 
 pub(crate) fn target() -> Target {
     let mut base = super::i686_unknown_linux_musl::target();
-    base.rust_abi = None;
+    base.rustc_abi = None;
     base.cpu = "pentium".into();
     base.llvm_target = "i586-unknown-linux-musl".into();
     // FIXME(compiler-team#422): musl targets should be dynamically linked by default.

compiler/rustc_target/src/spec/targets/i686_linux_android.rs

@@ -1,4 +1,4 @@
-use crate::spec::{RustAbi, SanitizerSet, StackProbeType, Target, TargetOptions, base};
+use crate::spec::{RustcAbi, SanitizerSet, StackProbeType, Target, TargetOptions, base};
 
 // See https://developer.android.com/ndk/guides/abis.html#x86
 // for target ABI requirements.
@@ -8,7 +8,7 @@ pub(crate) fn target() -> Target {
 
     base.max_atomic_width = Some(64);
 
-    base.rust_abi = Some(RustAbi::X86Sse2);
+    base.rustc_abi = Some(RustcAbi::X86Sse2);
     // https://developer.android.com/ndk/guides/abis.html#x86
     base.cpu = "pentiumpro".into();
     base.features = "+mmx,+sse,+sse2,+sse3,+ssse3".into();

compiler/rustc_target/src/spec/targets/i686_pc_windows_gnu.rs

@@ -1,8 +1,8 @@
-use crate::spec::{Cc, FramePointer, LinkerFlavor, Lld, RustAbi, Target, base};
+use crate::spec::{Cc, FramePointer, LinkerFlavor, Lld, RustcAbi, Target, base};
 
 pub(crate) fn target() -> Target {
     let mut base = base::windows_gnu::opts();
-    base.rust_abi = Some(RustAbi::X86Sse2);
+    base.rustc_abi = Some(RustcAbi::X86Sse2);
     base.cpu = "pentium4".into();
     base.max_atomic_width = Some(64);
     base.frame_pointer = FramePointer::Always; // Required for backtraces