Get something working

bjorn3 · bjorn3 · commit 722a47d0e2e8 · 2025-02-28T10:20:06.000Z
diff --git a/gen_intrinsics/src/def_visitor.rs b/gen_intrinsics/src/def_visitor.rs
@@ -60,15 +60,13 @@ impl<'ast> Visit<'ast> for DefVisitor {
 
         let mut ty = i.clone();
         ty.attrs = ty.attrs.into_iter().filter(|attr| attr.path().is_ident("repr")).collect();
+        ty.attrs.push(syn::parse_quote! { #[derive(Copy, Clone)] });
 
         self.structs.push(ty);
     }
 
     fn visit_item_type(&mut self, i: &'ast syn::ItemType) {
-        let mut alias = i.clone();
-        alias.attrs = alias.attrs.into_iter().filter(|attr| attr.path().is_ident("repr")).collect();
-
-        self.aliases.push(alias);
+        self.aliases.push(i.clone());
     }
 
     fn visit_item_foreign_mod(&mut self, i: &'ast syn::ItemForeignMod) {
diff --git a/gen_intrinsics/src/main.rs b/gen_intrinsics/src/main.rs
@@ -4,24 +4,25 @@ use std::io::Write;
 use std::process::Stdio;
 
 use object::{Object, ObjectSection, ObjectSymbol};
+use quote::quote;
 use syn::Ident;
 
 use crate::def_visitor::{DefVisitor, LlvmIntrinsicDef};
 
 fn compile_object(visitor: &DefVisitor) {
     let mut ts = proc_macro2::TokenStream::new();
-    ts.extend(quote::quote! {
+    ts.extend(quote! {
         #![feature(abi_unadjusted, f16, f128, link_llvm_intrinsics, repr_simd, simd_ffi)]
         #![allow(dead_code, improper_ctypes, improper_ctypes_definitions, internal_features, non_camel_case_types)]
     });
 
     let structs = &visitor.structs;
-    ts.extend(quote::quote! {
+    ts.extend(quote! {
         #(#structs)*
     });
 
     let aliases = &visitor.aliases;
-    ts.extend(quote::quote! {
+    ts.extend(quote! {
         #(#aliases)*
     });
 
@@ -31,32 +32,41 @@ fn compile_object(visitor: &DefVisitor) {
         let mangled_name = Ident::new(&link_name.replace('.', "__"), sig.ident.span());
         sig.ident = mangled_name.clone();
 
-        ts.extend(quote::quote! {
+        ts.extend(quote! {
             extern #abi {
                 #[link_name = #link_name]
                 #sig;
             }
         });
 
         sig.ident = Ident::new(&format!("__rust_cranelift_{mangled_name}"), sig.ident.span());
-        let args = sig
-            .inputs
-            .iter()
-            .map(|arg| match arg {
-                syn::FnArg::Typed(syn::PatType { pat, .. }) => match &**pat {
-                    syn::Pat::Ident(ident) => ident.ident.clone(),
+        let mut args = vec![];
+        for arg in &mut sig.inputs {
+            match arg {
+                syn::FnArg::Typed(syn::PatType { pat, ty, .. }) => match &**pat {
+                    syn::Pat::Ident(ident) => {
+                        let ident = ident.ident.clone();
+                        args.push(quote! { *#ident });
+                        *ty = syn::parse_quote! { &#ty };
+                    }
                     syn::Pat::Wild(_) => unreachable!("{sig:?}"),
                     _ => unreachable!("{pat:?}"),
                 },
                 _ => unreachable!(),
-            })
-            .collect::<Vec<_>>();
-
-        ts.extend(quote::quote! {
+            }
+        }
+        let ret_ty = match &sig.output {
+            syn::ReturnType::Default => quote! { () },
+            syn::ReturnType::Type(_, ty) => quote! { #ty },
+        };
+        sig.inputs.push(syn::parse_quote! { ret: &mut #ret_ty });
+        sig.output = syn::ReturnType::Default;
+
+        ts.extend(quote! {
             #[no_mangle]
             #[target_feature(enable = "neon,aes,sha2,sha3,sm4,crc,frintts,tme,i8mm,fcma,dotprod,rdm")] // FIXME infer from context
             unsafe extern "C" #sig {
-                #mangled_name(#(#args,)*)
+                *ret = #mangled_name(#(#args,)*)
             }
         });
     }
@@ -108,7 +118,7 @@ fn main() {
         // Sanity checks
         assert!(section.relocations().next().is_none(), "function {link_name} has relocations");
         assert!(
-            section.size() <= 0x14,
+            section.size() <= 0x32,
             "function {link_name} is too big. it is {} bytes",
             section.size(),
         );
diff --git a/src/intrinsics/llvm_aarch64.rs b/src/intrinsics/llvm_aarch64.rs
@@ -16,25 +16,31 @@ fn call_asm<'tcx>(
     code: &[u8],
 ) {
     let name = format!("__rust_cranelift_{name}");
-    let is_defined = fx.module.declarations().get_name(&name).is_none();
 
     let sig = Signature {
         params: args
             .iter()
-            .map(|arg| AbiParam::new(fx.clif_type(arg.layout().ty).unwrap()))
+            .map(|_| AbiParam::new(fx.pointer_type))
+            .chain(Some(AbiParam::new(fx.pointer_type)))
             .collect(),
-        returns: vec![AbiParam::new(fx.clif_type(ret.layout().ty).unwrap())],
+        returns: vec![],
         call_conv: CallConv::SystemV,
     };
 
     let func = fx.module.declare_function(&name, Linkage::Local, &sig).unwrap();
-    if !is_defined {
-        fx.module.define_function_bytes(func, &Function::new(), 4, &code, &[]).unwrap();
+    match fx.module.define_function_bytes(func, &Function::new(), 4, &code, &[]) {
+        Ok(_) | Err(cranelift_module::ModuleError::DuplicateDefinition(_)) => {}
+        err => err.unwrap(),
     }
 
     let func_ref = fx.module.declare_func_in_func(func, &mut fx.bcx.func);
-    let res = fx.bcx.ins().call(func_ref, &args.into_iter().map(|_| todo!()).collect::<Vec<_>>());
-    todo!("write result")
+    let mut args =
+        args.into_iter().map(|arg| arg.force_stack(fx).0.get_addr(fx)).collect::<Vec<_>>();
+    let res = CPlace::new_stack_slot(fx, ret.layout());
+    args.push(res.to_ptr().get_addr(fx));
+    fx.bcx.ins().call(func_ref, &args);
+    let res = res.to_cvalue(fx);
+    ret.write_cvalue(fx, res);
 }
 
 pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
@@ -218,7 +224,7 @@ pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
             });
         }
 
-        _ if intrinsic.starts_with("llvm.aarch64.neon.smax.v") => {
+        /*_ if intrinsic.starts_with("llvm.aarch64.neon.smax.v") => {
             intrinsic_args!(fx, args => (x, y); intrinsic);
 
             simd_pair_for_each_lane(
@@ -231,6 +237,186 @@ pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
                     fx.bcx.ins().select(gt, x_lane, y_lane)
                 },
             );
+        }*/
+        "llvm.aarch64.neon.smax.v16i8" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smax__v16i8",
+                &[a, b],
+                ret,
+                &[0, 0, 192, 61, 33, 0, 192, 61, 0, 100, 33, 78, 64, 0, 128, 61, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smax.v2i32" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smax__v2i32",
+                &[a, b],
+                ret,
+                &[0, 0, 64, 253, 33, 0, 64, 253, 0, 100, 161, 14, 64, 0, 0, 253, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smax.v4i16" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smax__v4i16",
+                &[a, b],
+                ret,
+                &[0, 0, 64, 253, 33, 0, 64, 253, 0, 100, 97, 14, 64, 0, 0, 253, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smax.v4i32" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smax__v4i32",
+                &[a, b],
+                ret,
+                &[0, 0, 192, 61, 33, 0, 192, 61, 0, 100, 161, 78, 64, 0, 128, 61, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smax.v8i16" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smax__v8i16",
+                &[a, b],
+                ret,
+                &[0, 0, 192, 61, 33, 0, 192, 61, 0, 100, 97, 78, 64, 0, 128, 61, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smax.v8i8" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smax__v8i8",
+                &[a, b],
+                ret,
+                &[0, 0, 64, 253, 33, 0, 64, 253, 0, 100, 33, 14, 64, 0, 0, 253, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxp.v16i8" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxp__v16i8",
+                &[a, b],
+                ret,
+                &[0, 0, 192, 61, 33, 0, 192, 61, 0, 164, 33, 78, 64, 0, 128, 61, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxp.v2i32" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxp__v2i32",
+                &[a, b],
+                ret,
+                &[0, 0, 64, 253, 33, 0, 64, 253, 0, 164, 161, 14, 64, 0, 0, 253, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxp.v4i16" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxp__v4i16",
+                &[a, b],
+                ret,
+                &[0, 0, 64, 253, 33, 0, 64, 253, 0, 164, 97, 14, 64, 0, 0, 253, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxp.v4i32" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxp__v4i32",
+                &[a, b],
+                ret,
+                &[0, 0, 192, 61, 33, 0, 192, 61, 0, 164, 161, 78, 64, 0, 128, 61, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxp.v8i16" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxp__v8i16",
+                &[a, b],
+                ret,
+                &[0, 0, 192, 61, 33, 0, 192, 61, 0, 164, 97, 78, 64, 0, 128, 61, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxp.v8i8" => {
+            intrinsic_args!(fx, args => (a, b); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxp__v8i8",
+                &[a, b],
+                ret,
+                &[0, 0, 64, 253, 33, 0, 64, 253, 0, 164, 33, 14, 64, 0, 0, 253, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxv.i16.v4i16" => {
+            intrinsic_args!(fx, args => (a); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxv__i16__v4i16",
+                &[a],
+                ret,
+                &[0, 0, 64, 253, 0, 168, 112, 14, 32, 0, 0, 125, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxv.i16.v8i16" => {
+            intrinsic_args!(fx, args => (a); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxv__i16__v8i16",
+                &[a],
+                ret,
+                &[0, 0, 192, 61, 0, 168, 112, 78, 32, 0, 0, 125, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxv.i32.v2i32" => {
+            intrinsic_args!(fx, args => (a); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxv__i32__v2i32",
+                &[a],
+                ret,
+                &[0, 0, 64, 253, 0, 164, 160, 14, 32, 0, 0, 189, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxv.i32.v4i32" => {
+            intrinsic_args!(fx, args => (a); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxv__i32__v4i32",
+                &[a],
+                ret,
+                &[0, 0, 192, 61, 0, 168, 176, 78, 32, 0, 0, 189, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxv.i8.v16i8" => {
+            intrinsic_args!(fx, args => (a); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxv__i8__v16i8",
+                &[a],
+                ret,
+                &[0, 0, 192, 61, 0, 168, 48, 78, 32, 0, 0, 13, 192, 3, 95, 214],
+            );
+        }
+        "llvm.aarch64.neon.smaxv.i8.v8i8" => {
+            intrinsic_args!(fx, args => (a); intrinsic);
+            call_asm(
+                fx,
+                "llvm__aarch64__neon__smaxv__i8__v8i8",
+                &[a],
+                ret,
+                &[0, 0, 64, 253, 0, 168, 48, 14, 32, 0, 0, 13, 192, 3, 95, 214],
+            );
         }
 
         _ if intrinsic.starts_with("llvm.aarch64.neon.umax.v") => {
@@ -485,19 +671,43 @@ pub(crate) fn codegen_aarch64_llvm_intrinsic_call<'tcx>(
         // ==== begin autogenerated section ====
         "llvm.trunc.v1f64" => {
             intrinsic_args!(fx, args => (a); intrinsic);
-            call_asm(fx, "llvm__trunc__v1f64", &[a], ret, &[0, 192, 101, 30, 192, 3, 95, 214]);
+            call_asm(
+                fx,
+                "llvm__trunc__v1f64",
+                &[a],
+                ret,
+                &[0, 0, 64, 253, 0, 192, 101, 30, 32, 0, 0, 253, 192, 3, 95, 214],
+            );
         }
         "llvm.trunc.v2f32" => {
             intrinsic_args!(fx, args => (a); intrinsic);
-            call_asm(fx, "llvm__trunc__v2f32", &[a], ret, &[0, 152, 161, 14, 192, 3, 95, 214]);
+            call_asm(
+                fx,
+                "llvm__trunc__v2f32",
+                &[a],
+                ret,
+                &[0, 0, 64, 253, 0, 152, 161, 14, 32, 0, 0, 253, 192, 3, 95, 214],
+            );
         }
         "llvm.trunc.v2f64" => {
             intrinsic_args!(fx, args => (a); intrinsic);
-            call_asm(fx, "llvm__trunc__v2f64", &[a], ret, &[0, 152, 225, 78, 192, 3, 95, 214]);
+            call_asm(
+                fx,
+                "llvm__trunc__v2f64",
+                &[a],
+                ret,
+                &[0, 0, 192, 61, 0, 152, 225, 78, 32, 0, 128, 61, 192, 3, 95, 214],
+            );
         }
         "llvm.trunc.v4f32" => {
             intrinsic_args!(fx, args => (a); intrinsic);
-            call_asm(fx, "llvm__trunc__v4f32", &[a], ret, &[0, 152, 161, 78, 192, 3, 95, 214]);
+            call_asm(
+                fx,
+                "llvm__trunc__v4f32",
+                &[a],
+                ret,
+                &[0, 0, 192, 61, 0, 152, 161, 78, 32, 0, 128, 61, 192, 3, 95, 214],
+            );
         }
         // ==== end autogenerated section
 
diff --git a/src/unwind_module.rs b/src/unwind_module.rs

Original file line number	Diff line number	Diff line change
`@@ -60,15 +60,13 @@ impl<'ast> Visit<'ast> for DefVisitor {`
`60`	`60`
`61`	`61`	`let mut ty = i.clone();`
`62`	`62`	`ty.attrs = ty.attrs.into_iter().filter(\|attr\| attr.path().is_ident("repr")).collect();`
	`63`	`+ ty.attrs.push(syn::parse_quote! { #[derive(Copy, Clone)] });`
`63`	`64`
`64`	`65`	`self.structs.push(ty);`
`65`	`66`	`}`
`66`	`67`
`67`	`68`	`fn visit_item_type(&mut self, i: &'ast syn::ItemType) {`
`68`		`- let mut alias = i.clone();`
`69`		`- alias.attrs = alias.attrs.into_iter().filter(\|attr\| attr.path().is_ident("repr")).collect();`
`70`		`-`
`71`		`- self.aliases.push(alias);`
	`69`	`+ self.aliases.push(i.clone());`
`72`	`70`	`}`
`73`	`71`
`74`	`72`	`fn visit_item_foreign_mod(&mut self, i: &'ast syn::ItemForeignMod) {`