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Remove workarounds for rust-lang/rust#60637 
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6 files changed

+113
-119
lines changed

6 files changed

+113
-119
lines changed

‎crates/core_arch/src/aarch64/neon/generated.rs‎

Lines changed: 18 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -17091,28 +17091,28 @@ pub fn vqdmlal_high_laneq_s32<const N: i32>(a: int64x2_t, b: int32x4_t, c: int32
1709117091
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlal_high_n_s16)"]
1709217092
#[inline]
1709317093
#[target_feature(enable = "neon")]
17094-
#[cfg_attr(test, assert_instr(sqdmlal2))]
17094+
#[cfg_attr(test, assert_instr(sqdmlal))]
1709517095
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1709617096
pub fn vqdmlal_high_n_s16(a: int32x4_t, b: int16x8_t, c: i16) -> int32x4_t {
1709717097
vqaddq_s32(a, vqdmull_high_n_s16(b, c))
1709817098
}
1709917099
#[doc = "Signed saturating doubling multiply-add long"]
17100-
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlal_high_s16)"]
17100+
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlal_high_n_s32)"]
1710117101
#[inline]
1710217102
#[target_feature(enable = "neon")]
17103-
#[cfg_attr(test, assert_instr(sqdmlal2))]
17103+
#[cfg_attr(test, assert_instr(sqdmlal))]
1710417104
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
17105-
pub fn vqdmlal_high_s16(a: int32x4_t, b: int16x8_t, c: int16x8_t) -> int32x4_t {
17106-
vqaddq_s32(a, vqdmull_high_s16(b, c))
17105+
pub fn vqdmlal_high_n_s32(a: int64x2_t, b: int32x4_t, c: i32) -> int64x2_t {
17106+
vqaddq_s64(a, vqdmull_high_n_s32(b, c))
1710717107
}
1710817108
#[doc = "Signed saturating doubling multiply-add long"]
17109-
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlal_high_n_s32)"]
17109+
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlal_high_s16)"]
1711017110
#[inline]
1711117111
#[target_feature(enable = "neon")]
1711217112
#[cfg_attr(test, assert_instr(sqdmlal2))]
1711317113
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
17114-
pub fn vqdmlal_high_n_s32(a: int64x2_t, b: int32x4_t, c: i32) -> int64x2_t {
17115-
vqaddq_s64(a, vqdmull_high_n_s32(b, c))
17114+
pub fn vqdmlal_high_s16(a: int32x4_t, b: int16x8_t, c: int16x8_t) -> int32x4_t {
17115+
vqaddq_s32(a, vqdmull_high_s16(b, c))
1711617116
}
1711717117
#[doc = "Signed saturating doubling multiply-add long"]
1711817118
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlal_high_s32)"]
@@ -17257,28 +17257,28 @@ pub fn vqdmlsl_high_laneq_s32<const N: i32>(a: int64x2_t, b: int32x4_t, c: int32
1725717257
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlsl_high_n_s16)"]
1725817258
#[inline]
1725917259
#[target_feature(enable = "neon")]
17260-
#[cfg_attr(test, assert_instr(sqdmlsl2))]
17260+
#[cfg_attr(test, assert_instr(sqdmlsl))]
1726117261
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1726217262
pub fn vqdmlsl_high_n_s16(a: int32x4_t, b: int16x8_t, c: i16) -> int32x4_t {
1726317263
vqsubq_s32(a, vqdmull_high_n_s16(b, c))
1726417264
}
1726517265
#[doc = "Signed saturating doubling multiply-subtract long"]
17266-
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlsl_high_s16)"]
17266+
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlsl_high_n_s32)"]
1726717267
#[inline]
1726817268
#[target_feature(enable = "neon")]
17269-
#[cfg_attr(test, assert_instr(sqdmlsl2))]
17269+
#[cfg_attr(test, assert_instr(sqdmlsl))]
1727017270
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
17271-
pub fn vqdmlsl_high_s16(a: int32x4_t, b: int16x8_t, c: int16x8_t) -> int32x4_t {
17272-
vqsubq_s32(a, vqdmull_high_s16(b, c))
17271+
pub fn vqdmlsl_high_n_s32(a: int64x2_t, b: int32x4_t, c: i32) -> int64x2_t {
17272+
vqsubq_s64(a, vqdmull_high_n_s32(b, c))
1727317273
}
1727417274
#[doc = "Signed saturating doubling multiply-subtract long"]
17275-
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlsl_high_n_s32)"]
17275+
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlsl_high_s16)"]
1727617276
#[inline]
1727717277
#[target_feature(enable = "neon")]
1727817278
#[cfg_attr(test, assert_instr(sqdmlsl2))]
1727917279
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
17280-
pub fn vqdmlsl_high_n_s32(a: int64x2_t, b: int32x4_t, c: i32) -> int64x2_t {
17281-
vqsubq_s64(a, vqdmull_high_n_s32(b, c))
17280+
pub fn vqdmlsl_high_s16(a: int32x4_t, b: int16x8_t, c: int16x8_t) -> int32x4_t {
17281+
vqsubq_s32(a, vqdmull_high_s16(b, c))
1728217282
}
1728317283
#[doc = "Signed saturating doubling multiply-subtract long"]
1728417284
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmlsl_high_s32)"]
@@ -17561,7 +17561,7 @@ pub fn vqdmull_high_laneq_s16<const N: i32>(a: int16x8_t, b: int16x8_t) -> int32
1756117561
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_n_s16)"]
1756217562
#[inline]
1756317563
#[target_feature(enable = "neon")]
17564-
#[cfg_attr(test, assert_instr(sqdmull2))]
17564+
#[cfg_attr(test, assert_instr(sqdmull))]
1756517565
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1756617566
pub fn vqdmull_high_n_s16(a: int16x8_t, b: i16) -> int32x4_t {
1756717567
unsafe {
@@ -17574,7 +17574,7 @@ pub fn vqdmull_high_n_s16(a: int16x8_t, b: i16) -> int32x4_t {
1757417574
#[doc = "[Arm's documentation](https://developer.arm.com/architectures/instruction-sets/intrinsics/vqdmull_high_n_s32)"]
1757517575
#[inline]
1757617576
#[target_feature(enable = "neon")]
17577-
#[cfg_attr(test, assert_instr(sqdmull2))]
17577+
#[cfg_attr(test, assert_instr(sqdmull))]
1757817578
#[stable(feature = "neon_intrinsics", since = "1.59.0")]
1757917579
pub fn vqdmull_high_n_s32(a: int32x4_t, b: i32) -> int64x2_t {
1758017580
unsafe {

‎crates/core_arch/src/arm_shared/neon/generated.rs‎

Lines changed: 44 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -10594,10 +10594,10 @@ pub fn vdupq_n_f16(a: f16) -> float16x8_t {
1059410594
#[inline]
1059510595
#[target_feature(enable = "neon")]
1059610596
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10597-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
10597+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1059810598
#[cfg_attr(
1059910599
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10600-
assert_instr(dup)
10600+
assert_instr(nop)
1060110601
)]
1060210602
#[cfg_attr(
1060310603
not(target_arch = "arm"),
@@ -10615,10 +10615,10 @@ pub fn vdup_n_f32(value: f32) -> float32x2_t {
1061510615
#[inline]
1061610616
#[target_feature(enable = "neon")]
1061710617
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10618-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
10618+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1061910619
#[cfg_attr(
1062010620
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10621-
assert_instr(dup)
10621+
assert_instr(nop)
1062210622
)]
1062310623
#[cfg_attr(
1062410624
not(target_arch = "arm"),
@@ -10636,10 +10636,10 @@ pub fn vdup_n_p16(value: p16) -> poly16x4_t {
1063610636
#[inline]
1063710637
#[target_feature(enable = "neon")]
1063810638
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10639-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
10639+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1064010640
#[cfg_attr(
1064110641
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10642-
assert_instr(dup)
10642+
assert_instr(nop)
1064310643
)]
1064410644
#[cfg_attr(
1064510645
not(target_arch = "arm"),
@@ -10657,10 +10657,10 @@ pub fn vdup_n_p8(value: p8) -> poly8x8_t {
1065710657
#[inline]
1065810658
#[target_feature(enable = "neon")]
1065910659
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10660-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
10660+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1066110661
#[cfg_attr(
1066210662
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10663-
assert_instr(dup)
10663+
assert_instr(nop)
1066410664
)]
1066510665
#[cfg_attr(
1066610666
not(target_arch = "arm"),
@@ -10678,10 +10678,10 @@ pub fn vdup_n_s16(value: i16) -> int16x4_t {
1067810678
#[inline]
1067910679
#[target_feature(enable = "neon")]
1068010680
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10681-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
10681+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1068210682
#[cfg_attr(
1068310683
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10684-
assert_instr(dup)
10684+
assert_instr(nop)
1068510685
)]
1068610686
#[cfg_attr(
1068710687
not(target_arch = "arm"),
@@ -10699,10 +10699,10 @@ pub fn vdup_n_s32(value: i32) -> int32x2_t {
1069910699
#[inline]
1070010700
#[target_feature(enable = "neon")]
1070110701
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10702-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
10702+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1070310703
#[cfg_attr(
1070410704
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10705-
assert_instr(fmov)
10705+
assert_instr(nop)
1070610706
)]
1070710707
#[cfg_attr(
1070810708
not(target_arch = "arm"),
@@ -10720,10 +10720,10 @@ pub fn vdup_n_s64(value: i64) -> int64x1_t {
1072010720
#[inline]
1072110721
#[target_feature(enable = "neon")]
1072210722
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10723-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
10723+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1072410724
#[cfg_attr(
1072510725
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10726-
assert_instr(dup)
10726+
assert_instr(nop)
1072710727
)]
1072810728
#[cfg_attr(
1072910729
not(target_arch = "arm"),
@@ -10741,10 +10741,10 @@ pub fn vdup_n_s8(value: i8) -> int8x8_t {
1074110741
#[inline]
1074210742
#[target_feature(enable = "neon")]
1074310743
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10744-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
10744+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1074510745
#[cfg_attr(
1074610746
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10747-
assert_instr(dup)
10747+
assert_instr(nop)
1074810748
)]
1074910749
#[cfg_attr(
1075010750
not(target_arch = "arm"),
@@ -10762,10 +10762,10 @@ pub fn vdup_n_u16(value: u16) -> uint16x4_t {
1076210762
#[inline]
1076310763
#[target_feature(enable = "neon")]
1076410764
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10765-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
10765+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1076610766
#[cfg_attr(
1076710767
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10768-
assert_instr(dup)
10768+
assert_instr(nop)
1076910769
)]
1077010770
#[cfg_attr(
1077110771
not(target_arch = "arm"),
@@ -10783,10 +10783,10 @@ pub fn vdup_n_u32(value: u32) -> uint32x2_t {
1078310783
#[inline]
1078410784
#[target_feature(enable = "neon")]
1078510785
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10786-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
10786+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1078710787
#[cfg_attr(
1078810788
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10789-
assert_instr(fmov)
10789+
assert_instr(nop)
1079010790
)]
1079110791
#[cfg_attr(
1079210792
not(target_arch = "arm"),
@@ -10804,10 +10804,10 @@ pub fn vdup_n_u64(value: u64) -> uint64x1_t {
1080410804
#[inline]
1080510805
#[target_feature(enable = "neon")]
1080610806
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
10807-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
10807+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
1080810808
#[cfg_attr(
1080910809
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
10810-
assert_instr(dup)
10810+
assert_instr(nop)
1081110811
)]
1081210812
#[cfg_attr(
1081310813
not(target_arch = "arm"),
@@ -31909,10 +31909,10 @@ pub fn vmovq_n_f16(a: f16) -> float16x8_t {
3190931909
#[inline]
3191031910
#[target_feature(enable = "neon")]
3191131911
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
31912-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
31912+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3191331913
#[cfg_attr(
3191431914
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
31915-
assert_instr(dup)
31915+
assert_instr(nop)
3191631916
)]
3191731917
#[cfg_attr(
3191831918
not(target_arch = "arm"),
@@ -31930,10 +31930,10 @@ pub fn vmov_n_f32(value: f32) -> float32x2_t {
3193031930
#[inline]
3193131931
#[target_feature(enable = "neon")]
3193231932
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
31933-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
31933+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3193431934
#[cfg_attr(
3193531935
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
31936-
assert_instr(dup)
31936+
assert_instr(nop)
3193731937
)]
3193831938
#[cfg_attr(
3193931939
not(target_arch = "arm"),
@@ -31951,10 +31951,10 @@ pub fn vmov_n_p16(value: p16) -> poly16x4_t {
3195131951
#[inline]
3195231952
#[target_feature(enable = "neon")]
3195331953
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
31954-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
31954+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3195531955
#[cfg_attr(
3195631956
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
31957-
assert_instr(dup)
31957+
assert_instr(nop)
3195831958
)]
3195931959
#[cfg_attr(
3196031960
not(target_arch = "arm"),
@@ -31972,10 +31972,10 @@ pub fn vmov_n_p8(value: p8) -> poly8x8_t {
3197231972
#[inline]
3197331973
#[target_feature(enable = "neon")]
3197431974
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
31975-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
31975+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3197631976
#[cfg_attr(
3197731977
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
31978-
assert_instr(dup)
31978+
assert_instr(nop)
3197931979
)]
3198031980
#[cfg_attr(
3198131981
not(target_arch = "arm"),
@@ -31993,10 +31993,10 @@ pub fn vmov_n_s16(value: i16) -> int16x4_t {
3199331993
#[inline]
3199431994
#[target_feature(enable = "neon")]
3199531995
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
31996-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
31996+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3199731997
#[cfg_attr(
3199831998
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
31999-
assert_instr(dup)
31999+
assert_instr(nop)
3200032000
)]
3200132001
#[cfg_attr(
3200232002
not(target_arch = "arm"),
@@ -32014,10 +32014,10 @@ pub fn vmov_n_s32(value: i32) -> int32x2_t {
3201432014
#[inline]
3201532015
#[target_feature(enable = "neon")]
3201632016
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
32017-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
32017+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3201832018
#[cfg_attr(
3201932019
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
32020-
assert_instr(fmov)
32020+
assert_instr(nop)
3202132021
)]
3202232022
#[cfg_attr(
3202332023
not(target_arch = "arm"),
@@ -32035,10 +32035,10 @@ pub fn vmov_n_s64(value: i64) -> int64x1_t {
3203532035
#[inline]
3203632036
#[target_feature(enable = "neon")]
3203732037
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
32038-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
32038+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3203932039
#[cfg_attr(
3204032040
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
32041-
assert_instr(dup)
32041+
assert_instr(nop)
3204232042
)]
3204332043
#[cfg_attr(
3204432044
not(target_arch = "arm"),
@@ -32056,10 +32056,10 @@ pub fn vmov_n_s8(value: i8) -> int8x8_t {
3205632056
#[inline]
3205732057
#[target_feature(enable = "neon")]
3205832058
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
32059-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.16"))]
32059+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3206032060
#[cfg_attr(
3206132061
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
32062-
assert_instr(dup)
32062+
assert_instr(nop)
3206332063
)]
3206432064
#[cfg_attr(
3206532065
not(target_arch = "arm"),
@@ -32077,10 +32077,10 @@ pub fn vmov_n_u16(value: u16) -> uint16x4_t {
3207732077
#[inline]
3207832078
#[target_feature(enable = "neon")]
3207932079
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
32080-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.32"))]
32080+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3208132081
#[cfg_attr(
3208232082
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
32083-
assert_instr(dup)
32083+
assert_instr(nop)
3208432084
)]
3208532085
#[cfg_attr(
3208632086
not(target_arch = "arm"),
@@ -32098,10 +32098,10 @@ pub fn vmov_n_u32(value: u32) -> uint32x2_t {
3209832098
#[inline]
3209932099
#[target_feature(enable = "neon")]
3210032100
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
32101-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmov"))]
32101+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3210232102
#[cfg_attr(
3210332103
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
32104-
assert_instr(fmov)
32104+
assert_instr(nop)
3210532105
)]
3210632106
#[cfg_attr(
3210732107
not(target_arch = "arm"),
@@ -32119,10 +32119,10 @@ pub fn vmov_n_u64(value: u64) -> uint64x1_t {
3211932119
#[inline]
3212032120
#[target_feature(enable = "neon")]
3212132121
#[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))]
32122-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("vdup.8"))]
32122+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr("nop"))]
3212332123
#[cfg_attr(
3212432124
all(test, any(target_arch = "aarch64", target_arch = "arm64ec")),
32125-
assert_instr(dup)
32125+
assert_instr(nop)
3212632126
)]
3212732127
#[cfg_attr(
3212832128
not(target_arch = "arm"),

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