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lqdAmanieu
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convert _mm_i64gather_pd to const generics
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crates/core_arch/src/x86/avx2.rs

Lines changed: 6 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1732,20 +1732,16 @@ pub unsafe fn _mm256_mask_i64gather_epi64<const SCALE: i32>(
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/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm_i64gather_pd)
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#[inline]
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#[target_feature(enable = "avx2")]
1735-
#[cfg_attr(test, assert_instr(vgatherqpd, scale = 1))]
1736-
#[rustc_args_required_const(2)]
1735+
#[cfg_attr(test, assert_instr(vgatherqpd, SCALE = 1))]
1736+
#[rustc_legacy_const_generics(2)]
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#[stable(feature = "simd_x86", since = "1.27.0")]
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pub unsafe fn _mm_i64gather_pd(slice: *const f64, offsets: __m128i, scale: i32) -> __m128d {
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pub unsafe fn _mm_i64gather_pd<const SCALE: i32>(slice: *const f64, offsets: __m128i) -> __m128d {
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static_assert_imm8_scale!(SCALE);
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let zero = _mm_setzero_pd();
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let neg_one = _mm_set1_pd(-1.0);
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let slice = slice as *const i8;
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let offsets = offsets.as_i64x2();
1743-
macro_rules! call {
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($imm8:expr) => {
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pgatherqpd(zero, slice, offsets, neg_one, $imm8)
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};
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}
1748-
constify_imm8_gather!(scale, call)
1744+
pgatherqpd(zero, slice, offsets, neg_one, SCALE as i8)
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}
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/// Returns values from `slice` at offsets determined by `offsets * scale`,
@@ -5883,7 +5879,7 @@ mod tests {
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j += 1.0;
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}
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// A multiplier of 8 is word-addressing for f64s
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let r = _mm_i64gather_pd(arr.as_ptr(), _mm_setr_epi64x(0, 16), 8);
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let r = _mm_i64gather_pd::<8>(arr.as_ptr(), _mm_setr_epi64x(0, 16));
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assert_eq_m128d(r, _mm_setr_pd(0.0, 16.0));
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}
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