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loongarch: Mark partial basic intrinsics as safe
1 parent c6b2f48 commit d2e5d33

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2 files changed

+48
-38
lines changed

2 files changed

+48
-38
lines changed

crates/core_arch/src/loongarch64/mod.rs

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -13,10 +13,12 @@ use crate::arch::asm;
1313
/// Reads the 64-bit stable counter value and the counter ID
1414
#[inline]
1515
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
16-
pub unsafe fn rdtime_d() -> (i64, isize) {
16+
pub fn rdtime_d() -> (i64, isize) {
1717
let val: i64;
1818
let tid: isize;
19-
asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
19+
unsafe {
20+
asm!("rdtime.d {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
21+
}
2022
(val, tid)
2123
}
2224

@@ -51,15 +53,15 @@ unsafe extern "unadjusted" {
5153
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
5254
#[inline]
5355
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
54-
pub unsafe fn crc_w_d_w(a: i64, b: i32) -> i32 {
55-
__crc_w_d_w(a, b)
56+
pub fn crc_w_d_w(a: i64, b: i32) -> i32 {
57+
unsafe { __crc_w_d_w(a, b) }
5658
}
5759

5860
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
5961
#[inline]
6062
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
61-
pub unsafe fn crcc_w_d_w(a: i64, b: i32) -> i32 {
62-
__crcc_w_d_w(a, b)
63+
pub fn crcc_w_d_w(a: i64, b: i32) -> i32 {
64+
unsafe { __crcc_w_d_w(a, b) }
6365
}
6466

6567
/// Generates the cache operation instruction

crates/core_arch/src/loongarch_shared/mod.rs

Lines changed: 40 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -5,20 +5,24 @@ use crate::arch::asm;
55
/// Reads the lower 32-bit stable counter value and the counter ID
66
#[inline]
77
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
8-
pub unsafe fn rdtimel_w() -> (i32, isize) {
8+
pub fn rdtimel_w() -> (i32, isize) {
99
let val: i32;
1010
let tid: isize;
11-
asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
11+
unsafe {
12+
asm!("rdtimel.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
13+
}
1214
(val, tid)
1315
}
1416

1517
/// Reads the upper 32-bit stable counter value and the counter ID
1618
#[inline]
1719
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
18-
pub unsafe fn rdtimeh_w() -> (i32, isize) {
20+
pub fn rdtimeh_w() -> (i32, isize) {
1921
let val: i32;
2022
let tid: isize;
21-
asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
23+
unsafe {
24+
asm!("rdtimeh.w {}, {}", out(reg) val, out(reg) tid, options(readonly, nostack));
25+
}
2226
(val, tid)
2327
}
2428

@@ -75,59 +79,63 @@ unsafe extern "unadjusted" {
7579
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
7680
#[inline]
7781
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
78-
pub unsafe fn crc_w_b_w(a: i32, b: i32) -> i32 {
79-
__crc_w_b_w(a, b)
82+
pub fn crc_w_b_w(a: i32, b: i32) -> i32 {
83+
unsafe { __crc_w_b_w(a, b) }
8084
}
8185

8286
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
8387
#[inline]
8488
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
85-
pub unsafe fn crc_w_h_w(a: i32, b: i32) -> i32 {
86-
__crc_w_h_w(a, b)
89+
pub fn crc_w_h_w(a: i32, b: i32) -> i32 {
90+
unsafe { __crc_w_h_w(a, b) }
8791
}
8892

8993
/// Calculate the CRC value using the IEEE 802.3 polynomial (0xEDB88320)
9094
#[inline]
9195
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
92-
pub unsafe fn crc_w_w_w(a: i32, b: i32) -> i32 {
93-
__crc_w_w_w(a, b)
96+
pub fn crc_w_w_w(a: i32, b: i32) -> i32 {
97+
unsafe { __crc_w_w_w(a, b) }
9498
}
9599

96100
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
97101
#[inline]
98102
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
99-
pub unsafe fn crcc_w_b_w(a: i32, b: i32) -> i32 {
100-
__crcc_w_b_w(a, b)
103+
pub fn crcc_w_b_w(a: i32, b: i32) -> i32 {
104+
unsafe { __crcc_w_b_w(a, b) }
101105
}
102106

103107
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
104108
#[inline]
105109
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
106-
pub unsafe fn crcc_w_h_w(a: i32, b: i32) -> i32 {
107-
__crcc_w_h_w(a, b)
110+
pub fn crcc_w_h_w(a: i32, b: i32) -> i32 {
111+
unsafe { __crcc_w_h_w(a, b) }
108112
}
109113

110114
/// Calculate the CRC value using the Castagnoli polynomial (0x82F63B78)
111115
#[inline]
112116
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
113-
pub unsafe fn crcc_w_w_w(a: i32, b: i32) -> i32 {
114-
__crcc_w_w_w(a, b)
117+
pub fn crcc_w_w_w(a: i32, b: i32) -> i32 {
118+
unsafe { __crcc_w_w_w(a, b) }
115119
}
116120

117121
/// Generates the memory barrier instruction
118122
#[inline]
119123
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
120-
pub unsafe fn dbar<const IMM15: i32>() {
124+
pub fn dbar<const IMM15: i32>() {
121125
static_assert_uimm_bits!(IMM15, 15);
122-
__dbar(IMM15);
126+
unsafe {
127+
__dbar(IMM15);
128+
}
123129
}
124130

125131
/// Generates the instruction-fetch barrier instruction
126132
#[inline]
127133
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
128-
pub unsafe fn ibar<const IMM15: i32>() {
134+
pub fn ibar<const IMM15: i32>() {
129135
static_assert_uimm_bits!(IMM15, 15);
130-
__ibar(IMM15);
136+
unsafe {
137+
__ibar(IMM15);
138+
}
131139
}
132140

133141
/// Moves data from a GPR to the FCSR
@@ -141,9 +149,9 @@ pub unsafe fn movgr2fcsr<const IMM5: i32>(a: i32) {
141149
/// Moves data from a FCSR to the GPR
142150
#[inline]
143151
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
144-
pub unsafe fn movfcsr2gr<const IMM5: i32>() -> i32 {
152+
pub fn movfcsr2gr<const IMM5: i32>() -> i32 {
145153
static_assert_uimm_bits!(IMM5, 5);
146-
__movfcsr2gr(IMM5)
154+
unsafe { __movfcsr2gr(IMM5) }
147155
}
148156

149157
/// Reads the 8-bit IO-CSR
@@ -199,8 +207,8 @@ pub unsafe fn brk<const IMM15: i32>() {
199207
/// Reads the CPU configuration register
200208
#[inline]
201209
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
202-
pub unsafe fn cpucfg(a: i32) -> i32 {
203-
__cpucfg(a)
210+
pub fn cpucfg(a: i32) -> i32 {
211+
unsafe { __cpucfg(a) }
204212
}
205213

206214
/// Generates the syscall instruction
@@ -215,30 +223,30 @@ pub unsafe fn syscall<const IMM15: i32>() {
215223
#[inline]
216224
#[target_feature(enable = "frecipe")]
217225
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
218-
pub unsafe fn frecipe_s(a: f32) -> f32 {
219-
__frecipe_s(a)
226+
pub fn frecipe_s(a: f32) -> f32 {
227+
unsafe { __frecipe_s(a) }
220228
}
221229

222230
/// Calculate the approximate double-precision result of 1.0 divided
223231
#[inline]
224232
#[target_feature(enable = "frecipe")]
225233
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
226-
pub unsafe fn frecipe_d(a: f64) -> f64 {
227-
__frecipe_d(a)
234+
pub fn frecipe_d(a: f64) -> f64 {
235+
unsafe { __frecipe_d(a) }
228236
}
229237

230238
/// Calculate the approximate single-precision result of dividing 1.0 by the square root
231239
#[inline]
232240
#[target_feature(enable = "frecipe")]
233241
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
234-
pub unsafe fn frsqrte_s(a: f32) -> f32 {
235-
__frsqrte_s(a)
242+
pub fn frsqrte_s(a: f32) -> f32 {
243+
unsafe { __frsqrte_s(a) }
236244
}
237245

238246
/// Calculate the approximate double-precision result of dividing 1.0 by the square root
239247
#[inline]
240248
#[target_feature(enable = "frecipe")]
241249
#[unstable(feature = "stdarch_loongarch", issue = "117427")]
242-
pub unsafe fn frsqrte_d(a: f64) -> f64 {
243-
__frsqrte_d(a)
250+
pub fn frsqrte_d(a: f64) -> f64 {
251+
unsafe { __frsqrte_d(a) }
244252
}

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