@@ -1455,21 +1455,15 @@ mod sealed {
14551455 #[ cfg_attr( test, assert_instr( vspltb, IMM4 = 15 ) ) ]
14561456 unsafe fn vspltb < const IMM4 : u32 > ( a : vector_signed_char ) -> vector_signed_char {
14571457 static_assert_uimm_bits ! ( IMM4 , 4 ) ;
1458- let b = u8x16:: splat ( IMM4 as u8 ) ;
1459- vec_perm ( a, a, transmute ( b) )
1458+ simd_shuffle ( a, a, const { u32x16:: from_array ( [ IMM4 ; 16 ] ) } )
14601459 }
14611460
14621461 #[ inline]
14631462 #[ target_feature( enable = "altivec" ) ]
14641463 #[ cfg_attr( test, assert_instr( vsplth, IMM3 = 7 ) ) ]
14651464 unsafe fn vsplth < const IMM3 : u32 > ( a : vector_signed_short ) -> vector_signed_short {
14661465 static_assert_uimm_bits ! ( IMM3 , 3 ) ;
1467- let b0 = IMM3 as u8 * 2 ;
1468- let b1 = b0 + 1 ;
1469- let b = u8x16:: new (
1470- b0, b1, b0, b1, b0, b1, b0, b1, b0, b1, b0, b1, b0, b1, b0, b1,
1471- ) ;
1472- vec_perm ( a, a, transmute ( b) )
1466+ simd_shuffle ( a, a, const { u32x8:: from_array ( [ IMM3 ; 8 ] ) } )
14731467 }
14741468
14751469 #[ inline]
@@ -1478,14 +1472,7 @@ mod sealed {
14781472 #[ cfg_attr( all( test, target_feature = "vsx" ) , assert_instr( xxspltw, IMM2 = 3 ) ) ]
14791473 unsafe fn vspltw < const IMM2 : u32 > ( a : vector_signed_int ) -> vector_signed_int {
14801474 static_assert_uimm_bits ! ( IMM2 , 2 ) ;
1481- let b0 = IMM2 as u8 * 4 ;
1482- let b1 = b0 + 1 ;
1483- let b2 = b0 + 2 ;
1484- let b3 = b0 + 3 ;
1485- let b = u8x16:: new (
1486- b0, b1, b2, b3, b0, b1, b2, b3, b0, b1, b2, b3, b0, b1, b2, b3,
1487- ) ;
1488- vec_perm ( a, a, transmute ( b) )
1475+ simd_shuffle ( a, a, const { u32x4:: from_array ( [ IMM2 ; 4 ] ) } )
14891476 }
14901477
14911478 #[ unstable( feature = "stdarch_powerpc" , issue = "111145" ) ]
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