uefi: Implement PciRootBridgeIo::allocate_buffer

Author: tmvkrpxl0

uefi-raw/src/protocol/pci/root_bridge.rs

@@ -2,6 +2,7 @@
 
 use crate::table::boot::{AllocateType, MemoryType};
 use crate::{Handle, PhysicalAddress, Status};
+use bitflags::bitflags;
 use core::ffi::c_void;
 use uguid::{Guid, guid};
 
@@ -37,6 +38,28 @@ newtype_enum! {
     }
 }
 
+bitflags! {
+    /// Describes PCI I/O Protocol Attribute bitflags specified in UEFI specification.
+    ///. https://uefi.org/specs/UEFI/2.10_A/14_Protocols_PCI_Bus_Support.html
+    #[derive(Copy, Clone, Debug, Eq, PartialEq)]
+    pub struct PciRootBridgeIoProtocolAttribute: u64 {
+        const PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO     = 0x0001;
+        const PCI_ATTRIBUTE_ISA_IO                 = 0x0002;
+        const PCI_ATTRIBUTE_VGA_PALETTE_IO         = 0x0004;
+        const PCI_ATTRIBUTE_VGA_MEMORY             = 0x0008;
+        const PCI_ATTRIBUTE_VGA_IO                 = 0x0010;
+        const PCI_ATTRIBUTE_IDE_PRIMARY_IO         = 0x0020;
+        const PCI_ATTRIBUTE_IDE_SECONDARY_IO       = 0x0040;
+        const PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE   = 0x0080;
+        const PCI_ATTRIBUTE_MEMORY_CACHED          = 0x0800;
+        const PCI_ATTRIBUTE_MEMORY_DISABLE         = 0x1000;
+        const PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE     = 0x8000;
+        const PCI_ATTRIBUTE_ISA_IO_16              = 0x10000;
+        const PCI_ATTRIBUTE_VGA_PALETTE_IO_16      = 0x20000;
+        const PCI_ATTRIBUTE_VGA_IO_16              = 0x40000;
+    }
+}
+
 #[derive(Debug)]
 #[repr(C)]
 pub struct PciRootBridgeIoAccess {

uefi-test-runner/src/proto/pci/mod.rs

@@ -3,5 +3,6 @@
 pub mod root_bridge;
 
 pub fn test() {
-    root_bridge::test();
+    root_bridge::test_io();
+    root_bridge::test_buffer();
 }

uefi-test-runner/src/proto/pci/root_bridge.rs

@@ -6,14 +6,16 @@ use uefi::boot::{OpenProtocolAttributes, OpenProtocolParams, ScopedProtocol, ima
 use uefi::proto::ProtocolPointer;
 use uefi::proto::pci::PciIoAddress;
 use uefi::proto::pci::root_bridge::PciRootBridgeIo;
+use uefi_raw::protocol::pci::root_bridge::PciRootBridgeIoProtocolAttribute;
+use uefi_raw::table::boot::MemoryType;
 
 const RED_HAT_PCI_VENDOR_ID: u16 = 0x1AF4;
 const MASS_STORAGE_CTRL_CLASS_CODE: u8 = 0x1;
 const SATA_CTRL_SUBCLASS_CODE: u8 = 0x6;
 
 const REG_SIZE: u8 = mem::size_of::<u32>() as u8;
 
-pub fn test() {
+pub fn test_io() {
     let pci_handles = uefi::boot::find_handles::<PciRootBridgeIo>().unwrap();
 
     let mut red_hat_dev_cnt = 0;
@@ -67,6 +69,27 @@ pub fn test() {
     assert!(sata_ctrl_cnt > 0);
 }
 
+pub fn test_buffer() {
+    let pci_handles = uefi::boot::find_handles::<PciRootBridgeIo>().unwrap();
+
+    for pci_handle in pci_handles {
+        let pci_proto = get_open_protocol::<PciRootBridgeIo>(pci_handle);
+
+        let mut buffer = pci_proto
+            .allocate_buffer::<[u8; 4096]>(
+                MemoryType::BOOT_SERVICES_DATA,
+                None,
+                PciRootBridgeIoProtocolAttribute::PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE,
+            )
+            .unwrap();
+        let buffer = unsafe {
+            buffer.assume_init_mut().fill(0);
+            buffer.assume_init()
+        };
+        assert_eq!(buffer.as_ptr().addr() % 4096, 0);
+    }
+}
+
 fn get_open_protocol<P: ProtocolPointer + ?Sized>(handle: Handle) -> ScopedProtocol<P> {
     let open_opts = OpenProtocolParams {
         handle,

uefi/src/proto/pci/buffer.rs

@@ -0,0 +1,82 @@
+// SPDX-License-Identifier: MIT OR Apache-2.0
+
+//! Defines wrapper allocated by PCI Root Bridge protocol.
+
+use core::mem::{ManuallyDrop, MaybeUninit};
+use core::num::NonZeroUsize;
+use core::ops::{Deref, DerefMut};
+use core::ptr::NonNull;
+use log::debug;
+use uefi_raw::Status;
+use uefi_raw::protocol::pci::root_bridge::PciRootBridgeIoProtocol;
+
+/// Smart pointer for wrapping owned buffer allocated by PCI Root Bridge protocol.
+#[derive(Debug)]
+pub struct PciBuffer<'p, T> {
+    pub(crate) base: NonNull<T>,
+    pub(crate) pages: NonZeroUsize,
+    pub(crate) proto: &'p PciRootBridgeIoProtocol,
+}
+
+impl<'p, T> PciBuffer<'p, MaybeUninit<T>> {
+    /// Assumes the contents of this buffer have been initialized.
+    ///
+    /// # Safety
+    /// Callers of this function must guarantee that value stored is valid.
+    #[must_use]
+    pub unsafe fn assume_init(self) -> PciBuffer<'p, T> {
+        let old = ManuallyDrop::new(self);
+        PciBuffer {
+            base: old.base.cast(),
+            pages: old.pages,
+            proto: old.proto,
+        }
+    }
+}
+
+impl<'p, T> AsRef<T> for PciBuffer<'p, T> {
+    fn as_ref(&self) -> &T {
+        unsafe { self.base.as_ref() }
+    }
+}
+
+impl<'p, T> AsMut<T> for PciBuffer<'p, T> {
+    fn as_mut(&mut self) -> &mut T {
+        unsafe { self.base.as_mut() }
+    }
+}
+
+impl<'p, T> Deref for PciBuffer<'p, T> {
+    type Target = T;
+
+    fn deref(&self) -> &Self::Target {
+        self.as_ref()
+    }
+}
+
+impl<'p, T> DerefMut for PciBuffer<'p, T> {
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        self.as_mut()
+    }
+}
+
+impl<'p, T> Drop for PciBuffer<'p, T> {
+    fn drop(&mut self) {
+        let status = unsafe {
+            (self.proto.free_buffer)(self.proto, self.pages.get(), self.base.as_ptr().cast())
+        };
+        match status {
+            Status::SUCCESS => {
+                debug!(
+                    "Freed {} pages at 0x{:X}",
+                    self.pages.get(),
+                    self.base.as_ptr().addr()
+                );
+            }
+            Status::INVALID_PARAMETER => {
+                panic!("PciBuffer was not created through valid protocol usage!")
+            }
+            _ => unreachable!(),
+        }
+    }
+}

uefi/src/proto/pci/mod.rs

@@ -6,6 +6,7 @@ use core::cmp::Ordering;
 
 use uefi_raw::protocol::pci::root_bridge::PciRootBridgeIoProtocolWidth;
 
+pub mod buffer;
 pub mod root_bridge;
 
 /// IO Address for PCI/register IO operations