11// SPDX-License-Identifier: MIT OR Apache-2.0
22
3+ use core:: cell:: RefCell ;
34use core:: mem;
4- use qcell:: { QCell , QCellOwner } ;
5- use uefi:: Handle ;
6- use uefi:: boot:: { OpenProtocolAttributes , OpenProtocolParams , ScopedProtocol , image_handle} ;
7- use uefi:: proto:: ProtocolPointer ;
8- use uefi:: proto:: pci:: PciIoAddress ;
5+ use uefi:: boot:: { image_handle, OpenProtocolAttributes , OpenProtocolParams , ScopedProtocol } ;
96use uefi:: proto:: pci:: root_bridge:: PciRootBridgeIo ;
10- use uefi_raw:: protocol:: pci:: root_bridge:: { PciRootBridgeIoProtocolAttribute , PciRootBridgeIoProtocolOperation , PciRootBridgeIoProtocolWidth } ;
7+ use uefi:: proto:: pci:: PciIoAddress ;
8+ use uefi:: proto:: ProtocolPointer ;
9+ use uefi:: Handle ;
10+ use uefi_raw:: protocol:: pci:: root_bridge:: {
11+ PciRootBridgeIoProtocolAttribute , PciRootBridgeIoProtocolOperation ,
12+ PciRootBridgeIoProtocolWidth ,
13+ } ;
1114use uefi_raw:: table:: boot:: { MemoryType , PAGE_SIZE } ;
1215
1316const RED_HAT_PCI_VENDOR_ID : u16 = 0x1AF4 ;
@@ -75,14 +78,15 @@ pub fn test_buffer() {
7578
7679 for pci_handle in pci_handles {
7780 let pci_proto = get_open_protocol :: < PciRootBridgeIo > ( pci_handle) ;
78-
79- let mut buffer = pci_proto
80- . allocate_buffer :: < [ u8 ; 4096 ] > (
81- MemoryType :: BOOT_SERVICES_DATA ,
82- None ,
83- PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
84- )
85- . unwrap ( ) ;
81+ let pci_proto: RefCell < _ > = pci_proto. into ( ) ;
82+
83+ let mut buffer = PciRootBridgeIo :: allocate_buffer :: < [ u8 ; 4096 ] > (
84+ & pci_proto,
85+ MemoryType :: BOOT_SERVICES_DATA ,
86+ None ,
87+ PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
88+ )
89+ . unwrap ( ) ;
8690 let buffer = unsafe {
8791 buffer. assume_init_mut ( ) . fill ( 0 ) ;
8892 buffer. assume_init ( )
@@ -96,19 +100,25 @@ pub fn test_mapping() {
96100
97101 for pci_handle in pci_handles {
98102 let pci_proto = get_open_protocol :: < PciRootBridgeIo > ( pci_handle) ;
99-
100- let mut buffer = pci_proto
101- . allocate_buffer :: < [ u8 ; 4096 ] > (
102- MemoryType :: BOOT_SERVICES_DATA ,
103- None ,
104- PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
105- )
106- . unwrap ( ) ;
103+ let pci_proto: RefCell < _ > = pci_proto. into ( ) ;
104+
105+ let mut buffer = PciRootBridgeIo :: allocate_buffer :: < [ u8 ; 4096 ] > (
106+ & pci_proto,
107+ MemoryType :: BOOT_SERVICES_DATA ,
108+ None ,
109+ PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
110+ )
111+ . unwrap ( ) ;
107112 let buffer = unsafe {
108113 buffer. assume_init_mut ( ) . fill ( 0 ) ;
109114 buffer. assume_init ( )
110115 } ;
111- let mapped = pci_proto. map ( PciRootBridgeIoProtocolOperation :: BUS_MASTER_COMMON_BUFFER64 , buffer. as_ref ( ) ) ;
116+
117+ let mapped = PciRootBridgeIo :: map (
118+ & pci_proto,
119+ PciRootBridgeIoProtocolOperation :: BUS_MASTER_COMMON_BUFFER64 ,
120+ buffer. as_ref ( ) ,
121+ ) ;
112122 if mapped. region ( ) . device_address == buffer. as_ptr ( ) . addr ( ) as u64 {
113123 info ! ( "This PCI device uses identity mapping" ) ;
114124 } else {
@@ -121,35 +131,48 @@ pub fn test_copy() {
121131 let pci_handles = uefi:: boot:: find_handles :: < PciRootBridgeIo > ( ) . unwrap ( ) ;
122132
123133 for pci_handle in pci_handles {
124- let mut owner = QCellOwner :: new ( ) ;
125- let item = QCell :: new ( & owner, get_open_protocol :: < PciRootBridgeIo > ( pci_handle) ) ;
126- let pci_proto = owner. rw ( & item) ;
127-
128- let mut src = pci_proto
129- . allocate_buffer :: < [ u32 ; 4096 / 4 ] > (
130- MemoryType :: BOOT_SERVICES_DATA ,
131- None ,
132- PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
133- )
134- . unwrap ( ) ;
134+ let pci_proto = get_open_protocol :: < PciRootBridgeIo > ( pci_handle) ;
135+ let pci_proto: RefCell < _ > = pci_proto. into ( ) ;
136+
137+ let mut src = PciRootBridgeIo :: allocate_buffer :: < [ u32 ; 4096 / 4 ] > (
138+ & pci_proto,
139+ MemoryType :: BOOT_SERVICES_DATA ,
140+ None ,
141+ PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
142+ )
143+ . unwrap ( ) ;
135144 assert_eq ! ( size_of_val( src. as_ref( ) ) , size_of:: <[ u8 ; PAGE_SIZE ] >( ) ) ;
136145 let src = unsafe {
137146 src. assume_init_mut ( ) . fill ( 0xDEADBEEF ) ;
138147 src. assume_init ( )
139148 } ;
140- let src_mapped = pci_proto. map ( PciRootBridgeIoProtocolOperation :: BUS_MASTER_READ , src. as_ref ( ) ) ;
141-
142- let dst = pci_proto
143- . allocate_buffer :: < [ u32 ; 4096 / 4 ] > (
144- MemoryType :: BOOT_SERVICES_DATA ,
145- None ,
146- PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
147- )
148- . unwrap ( ) ;
149+ let src_mapped = PciRootBridgeIo :: map (
150+ & pci_proto,
151+ PciRootBridgeIoProtocolOperation :: BUS_MASTER_READ ,
152+ src. as_ref ( ) ,
153+ ) ;
154+
155+ let dst = PciRootBridgeIo :: allocate_buffer :: < [ u32 ; 4096 / 4 ] > (
156+ & pci_proto,
157+ MemoryType :: BOOT_SERVICES_DATA ,
158+ None ,
159+ PciRootBridgeIoProtocolAttribute :: PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE ,
160+ )
161+ . unwrap ( ) ;
149162 assert_eq ! ( size_of_val( dst. as_ref( ) ) , size_of:: <[ u8 ; PAGE_SIZE ] >( ) ) ;
150- let dst_mapped = pci_proto. map ( PciRootBridgeIoProtocolOperation :: BUS_MASTER_WRITE , dst. as_ref ( ) ) ;
151-
152- pci_proto. copy ( PciRootBridgeIoProtocolWidth :: UINT32 , dst_mapped. region ( ) , src_mapped. region ( ) ) . unwrap ( ) ;
163+ let dst_mapped = PciRootBridgeIo :: map (
164+ & pci_proto,
165+ PciRootBridgeIoProtocolOperation :: BUS_MASTER_WRITE ,
166+ dst. as_ref ( ) ,
167+ ) ;
168+
169+ PciRootBridgeIo :: copy (
170+ & pci_proto,
171+ PciRootBridgeIoProtocolWidth :: UINT32 ,
172+ dst_mapped. region ( ) ,
173+ src_mapped. region ( ) ,
174+ )
175+ . unwrap ( ) ;
153176 drop ( dst_mapped) ;
154177 let dst = unsafe { dst. assume_init ( ) } ;
155178
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