Merge pull request #130 from AntoineSebert/master

phil-opp · web-flow · commit d2fa968d1df1 · 2020-02-27T13:55:37.000+01:00
Fix clippy warnings
diff --git a/src/instructions/port.rs b/src/instructions/port.rs
@@ -118,7 +118,7 @@ impl<T: PortRead> PortReadOnly<T> {
     #[cfg(feature = "const_fn")]
     pub const fn new(port: u16) -> PortReadOnly<T> {
         PortReadOnly {
-            port: port,
+            port,
             phantom: PhantomData,
         }
     }
@@ -127,7 +127,7 @@ impl<T: PortRead> PortReadOnly<T> {
     #[cfg(not(feature = "const_fn"))]
     pub fn new(port: u16) -> PortReadOnly<T> {
         PortReadOnly {
-            port: port,
+            port,
             phantom: PhantomData,
         }
     }
@@ -147,7 +147,7 @@ impl<T: PortWrite> PortWriteOnly<T> {
     #[cfg(feature = "const_fn")]
     pub const fn new(port: u16) -> PortWriteOnly<T> {
         PortWriteOnly {
-            port: port,
+            port,
             phantom: PhantomData,
         }
     }
@@ -156,7 +156,7 @@ impl<T: PortWrite> PortWriteOnly<T> {
     #[cfg(not(feature = "const_fn"))]
     pub fn new(port: u16) -> PortWriteOnly<T> {
         PortWriteOnly {
-            port: port,
+            port,
             phantom: PhantomData,
         }
     }
@@ -176,7 +176,7 @@ impl<T: PortReadWrite> Port<T> {
     #[cfg(feature = "const_fn")]
     pub const fn new(port: u16) -> Port<T> {
         Port {
-            port: port,
+            port,
             phantom: PhantomData,
         }
     }
@@ -185,7 +185,7 @@ impl<T: PortReadWrite> Port<T> {
     #[cfg(not(feature = "const_fn"))]
     pub fn new(port: u16) -> Port<T> {
         Port {
-            port: port,
+            port,
             phantom: PhantomData,
         }
     }
diff --git a/src/registers/control.rs b/src/registers/control.rs
@@ -12,7 +12,7 @@ bitflags! {
     /// Configuration flags of the Cr0 register.
     pub struct Cr0Flags: u64 {
         /// Enables protected mode.
-        const PROTECTED_MODE_ENABLE = 1 << 0;
+        const PROTECTED_MODE_ENABLE = 1;
         /// Enables monitoring of the coprocessor, typical for x87 instructions.
         ///
         /// Controls together with the `TASK_SWITCHED` flag whether a `wait` or `fwait`
@@ -73,7 +73,7 @@ bitflags! {
     pub struct Cr4Flags: u64 {
         /// Enables hardware-supported performance enhancements for software running in
         /// virtual-8086 mode.
-        const VIRTUAL_8086_MODE_EXTENSIONS = 1 << 0;
+        const VIRTUAL_8086_MODE_EXTENSIONS = 1;
         /// Enables support for protected-mode virtual interrupts.
         const PROTECTED_MODE_VIRTUAL_INTERRUPTS = 1 << 1;
         /// When set, only privilege-level 0 can execute the RDTSC or RDTSCP instructions.
diff --git a/src/registers/model_specific.rs b/src/registers/model_specific.rs
@@ -48,7 +48,7 @@ pub struct SFMask;
 
 impl Efer {
     /// The underlying model specific register.
-    pub const MSR: Msr = Msr(0xC0000080);
+    pub const MSR: Msr = Msr(0xC000_0080);
 }
 
 impl FsBase {
@@ -85,7 +85,7 @@ bitflags! {
     /// Flags of the Extended Feature Enable Register.
     pub struct EferFlags: u64 {
         /// Enables the `syscall` and `sysret` instructions.
-        const SYSTEM_CALL_EXTENSIONS = 1 << 0;
+        const SYSTEM_CALL_EXTENSIONS = 1;
         /// Activates long mode, requires activating paging.
         const LONG_MODE_ENABLE = 1 << 8;
         /// Indicates that long mode is active.
@@ -264,12 +264,12 @@ mod x86_64 {
             SegmentSelector,
         ) {
             let raw = Self::read_raw();
-            return (
+            (
                 SegmentSelector((raw.0 + 16).try_into().unwrap()),
                 SegmentSelector((raw.0 + 8).try_into().unwrap()),
                 SegmentSelector((raw.1).try_into().unwrap()),
                 SegmentSelector((raw.1 + 8).try_into().unwrap()),
-            );
+            )
         }
 
         /// Write the Ring 0 and Ring 3 segment bases.
@@ -323,7 +323,7 @@ mod x86_64 {
                 return Err("Syscall's segment must be a Ring0 segment.");
             }
 
-            unsafe { Self::write_raw((ss_sysret.0 - 8).into(), cs_syscall.0.into()) };
+            unsafe { Self::write_raw(ss_sysret.0 - 8, cs_syscall.0) };
 
             Ok(())
         }
diff --git a/src/registers/rflags.rs b/src/registers/rflags.rs
@@ -58,7 +58,7 @@ bitflags! {
         const PARITY_FLAG = 1 << 2;
         /// Set by hardware if last arithmetic operation generated a carry out of the
         /// most-significant bit of the result.
-        const CARRY_FLAG = 1 << 0;
+        const CARRY_FLAG = 1;
     }
 }
 
diff --git a/src/structures/idt.rs b/src/structures/idt.rs
@@ -824,7 +824,7 @@ bitflags! {
     pub struct PageFaultErrorCode: u64 {
         /// If this flag is set, the page fault was caused by a page-protection violation,
         /// else the page fault was caused by a not-present page.
-        const PROTECTION_VIOLATION = 1 << 0;
+        const PROTECTION_VIOLATION = 1;
 
         /// If this flag is set, the memory access that caused the page fault was a write.
         /// Else the access that caused the page fault is a memory read. This bit does not
diff --git a/src/structures/paging/frame.rs b/src/structures/paging/frame.rs
@@ -74,26 +74,26 @@ impl<S: PageSize> fmt::Debug for PhysFrame<S> {
 impl<S: PageSize> Add<u64> for PhysFrame<S> {
     type Output = Self;
     fn add(self, rhs: u64) -> Self::Output {
-        PhysFrame::containing_address(self.start_address() + rhs * u64::from(S::SIZE))
+        PhysFrame::containing_address(self.start_address() + rhs * S::SIZE)
     }
 }
 
 impl<S: PageSize> AddAssign<u64> for PhysFrame<S> {
     fn add_assign(&mut self, rhs: u64) {
-        *self = self.clone() + rhs;
+        *self = *self + rhs;
     }
 }
 
 impl<S: PageSize> Sub<u64> for PhysFrame<S> {
     type Output = Self;
     fn sub(self, rhs: u64) -> Self::Output {
-        PhysFrame::containing_address(self.start_address() - rhs * u64::from(S::SIZE))
+        PhysFrame::containing_address(self.start_address() - rhs * S::SIZE)
     }
 }
 
 impl<S: PageSize> SubAssign<u64> for PhysFrame<S> {
     fn sub_assign(&mut self, rhs: u64) {
-        *self = self.clone() - rhs;
+        *self = *self - rhs;
     }
 }
 
@@ -118,7 +118,7 @@ impl<S: PageSize> PhysFrameRange<S> {
     /// Returns whether the range contains no frames.
     #[inline]
     pub fn is_empty(&self) -> bool {
-        !(self.start < self.end)
+        self.start >= self.end
     }
 }
 
@@ -127,7 +127,7 @@ impl<S: PageSize> Iterator for PhysFrameRange<S> {
 
     fn next(&mut self) -> Option<Self::Item> {
         if self.start < self.end {
-            let frame = self.start.clone();
+            let frame = self.start;
             self.start += 1;
             Some(frame)
         } else {
@@ -159,7 +159,7 @@ impl<S: PageSize> PhysFrameRangeInclusive<S> {
     /// Returns whether the range contains no frames.
     #[inline]
     pub fn is_empty(&self) -> bool {
-        !(self.start <= self.end)
+        self.start >= self.end
     }
 }
 
@@ -168,7 +168,7 @@ impl<S: PageSize> Iterator for PhysFrameRangeInclusive<S> {
 
     fn next(&mut self) -> Option<Self::Item> {
         if self.start <= self.end {
-            let frame = self.start.clone();
+            let frame = self.start;
             self.start += 1;
             Some(frame)
         } else {
diff --git a/src/structures/paging/page.rs b/src/structures/paging/page.rs
@@ -206,26 +206,26 @@ impl<S: PageSize> fmt::Debug for Page<S> {
 impl<S: PageSize> Add<u64> for Page<S> {
     type Output = Self;
     fn add(self, rhs: u64) -> Self::Output {
-        Page::containing_address(self.start_address() + rhs * u64::from(S::SIZE))
+        Page::containing_address(self.start_address() + rhs * S::SIZE)
     }
 }
 
 impl<S: PageSize> AddAssign<u64> for Page<S> {
     fn add_assign(&mut self, rhs: u64) {
-        *self = self.clone() + rhs;
+        *self = *self + rhs;
     }
 }
 
 impl<S: PageSize> Sub<u64> for Page<S> {
     type Output = Self;
     fn sub(self, rhs: u64) -> Self::Output {
-        Page::containing_address(self.start_address() - rhs * u64::from(S::SIZE))
+        Page::containing_address(self.start_address() - rhs * S::SIZE)
     }
 }
 
 impl<S: PageSize> SubAssign<u64> for Page<S> {
     fn sub_assign(&mut self, rhs: u64) {
-        *self = self.clone() - rhs;
+        *self = *self - rhs;
     }
 }
 
@@ -249,7 +249,7 @@ pub struct PageRange<S: PageSize = Size4KiB> {
 impl<S: PageSize> PageRange<S> {
     /// Returns wether this range contains no pages.
     pub fn is_empty(&self) -> bool {
-        !(self.start < self.end)
+        self.start >= self.end
     }
 }
 
@@ -258,7 +258,7 @@ impl<S: PageSize> Iterator for PageRange<S> {
 
     fn next(&mut self) -> Option<Self::Item> {
         if self.start < self.end {
-            let page = self.start.clone();
+            let page = self.start;
             self.start += 1;
             Some(page)
         } else {
@@ -300,7 +300,7 @@ pub struct PageRangeInclusive<S: PageSize = Size4KiB> {
 impl<S: PageSize> PageRangeInclusive<S> {
     /// Returns wether this range contains no pages.
     pub fn is_empty(&self) -> bool {
-        !(self.start <= self.end)
+        self.start >= self.end
     }
 }
 
@@ -309,7 +309,7 @@ impl<S: PageSize> Iterator for PageRangeInclusive<S> {
 
     fn next(&mut self) -> Option<Self::Item> {
         if self.start <= self.end {
-            let page = self.start.clone();
+            let page = self.start;
             self.start += 1;
             Some(page)
         } else {
diff --git a/src/structures/paging/page_table.rs b/src/structures/paging/page_table.rs
@@ -114,7 +114,7 @@ bitflags! {
     /// Possible flags for a page table entry.
     pub struct PageTableFlags: u64 {
         /// Specifies whether the mapped frame or page table is loaded in memory.
-        const PRESENT =         1 << 0;
+        const PRESENT =         1;
         /// Controls whether writes to the mapped frames are allowed.
         ///
         /// If this bit is unset in a level 1 page table entry, the mapped frame is read-only.

Original file line number	Diff line number	Diff line change
`@@ -118,7 +118,7 @@ impl<T: PortRead> PortReadOnly<T> {`
`118`	`118`	`#[cfg(feature = "const_fn")]`
`119`	`119`	`pub const fn new(port: u16) -> PortReadOnly<T> {`
`120`	`120`	`PortReadOnly {`
`121`		`- port: port,`
	`121`	`+ port,`
`122`	`122`	`phantom: PhantomData,`
`123`	`123`	`}`
`124`	`124`	`}`
`@@ -127,7 +127,7 @@ impl<T: PortRead> PortReadOnly<T> {`
`127`	`127`	`#[cfg(not(feature = "const_fn"))]`
`128`	`128`	`pub fn new(port: u16) -> PortReadOnly<T> {`
`129`	`129`	`PortReadOnly {`
`130`		`- port: port,`
	`130`	`+ port,`
`131`	`131`	`phantom: PhantomData,`
`132`	`132`	`}`
`133`	`133`	`}`
`@@ -147,7 +147,7 @@ impl<T: PortWrite> PortWriteOnly<T> {`
`147`	`147`	`#[cfg(feature = "const_fn")]`
`148`	`148`	`pub const fn new(port: u16) -> PortWriteOnly<T> {`
`149`	`149`	`PortWriteOnly {`
`150`		`- port: port,`
	`150`	`+ port,`
`151`	`151`	`phantom: PhantomData,`
`152`	`152`	`}`
`153`	`153`	`}`
`@@ -156,7 +156,7 @@ impl<T: PortWrite> PortWriteOnly<T> {`
`156`	`156`	`#[cfg(not(feature = "const_fn"))]`
`157`	`157`	`pub fn new(port: u16) -> PortWriteOnly<T> {`
`158`	`158`	`PortWriteOnly {`
`159`		`- port: port,`
	`159`	`+ port,`
`160`	`160`	`phantom: PhantomData,`
`161`	`161`	`}`
`162`	`162`	`}`
`@@ -176,7 +176,7 @@ impl<T: PortReadWrite> Port<T> {`
`176`	`176`	`#[cfg(feature = "const_fn")]`
`177`	`177`	`pub const fn new(port: u16) -> Port<T> {`
`178`	`178`	`Port {`
`179`		`- port: port,`
	`179`	`+ port,`
`180`	`180`	`phantom: PhantomData,`
`181`	`181`	`}`
`182`	`182`	`}`
`@@ -185,7 +185,7 @@ impl<T: PortReadWrite> Port<T> {`
`185`	`185`	`#[cfg(not(feature = "const_fn"))]`
`186`	`186`	`pub fn new(port: u16) -> Port<T> {`
`187`	`187`	`Port {`
`188`		`- port: port,`
	`188`	`+ port,`
`189`	`189`	`phantom: PhantomData,`
`190`	`190`	`}`
`191`	`191`	`}`
Original file line number	Diff line number	Diff line change
`@@ -58,7 +58,7 @@ bitflags! {`
`58`	`58`	`const PARITY_FLAG = 1 << 2;`
`59`	`59`	`/// Set by hardware if last arithmetic operation generated a carry out of the`
`60`	`60`	`/// most-significant bit of the result.`
`61`		`- const CARRY_FLAG = 1 << 0;`
	`61`	`+ const CARRY_FLAG = 1;`
`62`	`62`	`}`
`63`	`63`	`}`
`64`	`64`
Original file line number	Diff line number	Diff line change
`@@ -74,26 +74,26 @@ impl<S: PageSize> fmt::Debug for PhysFrame<S> {`
`74`	`74`	`impl<S: PageSize> Add<u64> for PhysFrame<S> {`
`75`	`75`	`type Output = Self;`
`76`	`76`	`fn add(self, rhs: u64) -> Self::Output {`
`77`		`- PhysFrame::containing_address(self.start_address() + rhs * u64::from(S::SIZE))`
	`77`	`+ PhysFrame::containing_address(self.start_address() + rhs * S::SIZE)`
`78`	`78`	`}`
`79`	`79`	`}`
`80`	`80`
`81`	`81`	`impl<S: PageSize> AddAssign<u64> for PhysFrame<S> {`
`82`	`82`	`fn add_assign(&mut self, rhs: u64) {`
`83`		`- *self = self.clone() + rhs;`
	`83`	`+ self = self + rhs;`
`84`	`84`	`}`
`85`	`85`	`}`
`86`	`86`
`87`	`87`	`impl<S: PageSize> Sub<u64> for PhysFrame<S> {`
`88`	`88`	`type Output = Self;`
`89`	`89`	`fn sub(self, rhs: u64) -> Self::Output {`
`90`		`- PhysFrame::containing_address(self.start_address() - rhs * u64::from(S::SIZE))`
	`90`	`+ PhysFrame::containing_address(self.start_address() - rhs * S::SIZE)`
`91`	`91`	`}`
`92`	`92`	`}`
`93`	`93`
`94`	`94`	`impl<S: PageSize> SubAssign<u64> for PhysFrame<S> {`
`95`	`95`	`fn sub_assign(&mut self, rhs: u64) {`
`96`		`- *self = self.clone() - rhs;`
	`96`	`+ self = self - rhs;`
`97`	`97`	`}`
`98`	`98`	`}`
`99`	`99`
`@@ -118,7 +118,7 @@ impl<S: PageSize> PhysFrameRange<S> {`
`118`	`118`	`/// Returns whether the range contains no frames.`
`119`	`119`	`#[inline]`
`120`	`120`	`pub fn is_empty(&self) -> bool {`
`121`		`- !(self.start < self.end)`
	`121`	`+ self.start >= self.end`
`122`	`122`	`}`
`123`	`123`	`}`
`124`	`124`
`@@ -127,7 +127,7 @@ impl<S: PageSize> Iterator for PhysFrameRange<S> {`
`127`	`127`
`128`	`128`	`fn next(&mut self) -> Option<Self::Item> {`
`129`	`129`	`if self.start < self.end {`
`130`		`- let frame = self.start.clone();`
	`130`	`+ let frame = self.start;`
`131`	`131`	`self.start += 1;`
`132`	`132`	`Some(frame)`
`133`	`133`	`} else {`
`@@ -159,7 +159,7 @@ impl<S: PageSize> PhysFrameRangeInclusive<S> {`
`159`	`159`	`/// Returns whether the range contains no frames.`
`160`	`160`	`#[inline]`
`161`	`161`	`pub fn is_empty(&self) -> bool {`
`162`		`- !(self.start <= self.end)`
	`162`	`+ self.start >= self.end`
`163`	`163`	`}`
`164`	`164`	`}`
`165`	`165`
`@@ -168,7 +168,7 @@ impl<S: PageSize> Iterator for PhysFrameRangeInclusive<S> {`
`168`	`168`
`169`	`169`	`fn next(&mut self) -> Option<Self::Item> {`
`170`	`170`	`if self.start <= self.end {`
`171`		`- let frame = self.start.clone();`
	`171`	`+ let frame = self.start;`
`172`	`172`	`self.start += 1;`
`173`	`173`	`Some(frame)`
`174`	`174`	`} else {`
Original file line number	Diff line number	Diff line change
`@@ -206,26 +206,26 @@ impl<S: PageSize> fmt::Debug for Page<S> {`
`206`	`206`	`impl<S: PageSize> Add<u64> for Page<S> {`
`207`	`207`	`type Output = Self;`
`208`	`208`	`fn add(self, rhs: u64) -> Self::Output {`
`209`		`- Page::containing_address(self.start_address() + rhs * u64::from(S::SIZE))`
	`209`	`+ Page::containing_address(self.start_address() + rhs * S::SIZE)`
`210`	`210`	`}`
`211`	`211`	`}`
`212`	`212`
`213`	`213`	`impl<S: PageSize> AddAssign<u64> for Page<S> {`
`214`	`214`	`fn add_assign(&mut self, rhs: u64) {`
`215`		`- *self = self.clone() + rhs;`
	`215`	`+ self = self + rhs;`
`216`	`216`	`}`
`217`	`217`	`}`
`218`	`218`
`219`	`219`	`impl<S: PageSize> Sub<u64> for Page<S> {`
`220`	`220`	`type Output = Self;`
`221`	`221`	`fn sub(self, rhs: u64) -> Self::Output {`
`222`		`- Page::containing_address(self.start_address() - rhs * u64::from(S::SIZE))`
	`222`	`+ Page::containing_address(self.start_address() - rhs * S::SIZE)`
`223`	`223`	`}`
`224`	`224`	`}`
`225`	`225`
`226`	`226`	`impl<S: PageSize> SubAssign<u64> for Page<S> {`
`227`	`227`	`fn sub_assign(&mut self, rhs: u64) {`
`228`		`- *self = self.clone() - rhs;`
	`228`	`+ self = self - rhs;`
`229`	`229`	`}`
`230`	`230`	`}`
`231`	`231`
`@@ -249,7 +249,7 @@ pub struct PageRange<S: PageSize = Size4KiB> {`
`249`	`249`	`impl<S: PageSize> PageRange<S> {`
`250`	`250`	`/// Returns wether this range contains no pages.`
`251`	`251`	`pub fn is_empty(&self) -> bool {`
`252`		`- !(self.start < self.end)`
	`252`	`+ self.start >= self.end`
`253`	`253`	`}`
`254`	`254`	`}`
`255`	`255`
`@@ -258,7 +258,7 @@ impl<S: PageSize> Iterator for PageRange<S> {`
`258`	`258`
`259`	`259`	`fn next(&mut self) -> Option<Self::Item> {`
`260`	`260`	`if self.start < self.end {`
`261`		`- let page = self.start.clone();`
	`261`	`+ let page = self.start;`
`262`	`262`	`self.start += 1;`
`263`	`263`	`Some(page)`
`264`	`264`	`} else {`
`@@ -300,7 +300,7 @@ pub struct PageRangeInclusive<S: PageSize = Size4KiB> {`
`300`	`300`	`impl<S: PageSize> PageRangeInclusive<S> {`
`301`	`301`	`/// Returns wether this range contains no pages.`
`302`	`302`	`pub fn is_empty(&self) -> bool {`
`303`		`- !(self.start <= self.end)`
	`303`	`+ self.start >= self.end`
`304`	`304`	`}`
`305`	`305`	`}`
`306`	`306`
`@@ -309,7 +309,7 @@ impl<S: PageSize> Iterator for PageRangeInclusive<S> {`
`309`	`309`
`310`	`310`	`fn next(&mut self) -> Option<Self::Item> {`
`311`	`311`	`if self.start <= self.end {`
`312`		`- let page = self.start.clone();`
	`312`	`+ let page = self.start;`
`313`	`313`	`self.start += 1;`
`314`	`314`	`Some(page)`
`315`	`315`	`} else {`