Merge pull request #178 from rust-osdev/fix_const_item_mutation

Fix const_item_mutation warnings added in latest Rust nightly

Author: phil-opp

src/registers/model_specific.rs

@@ -189,7 +189,8 @@ mod x86_64 {
         /// break memory safety with wrong flags, e.g. by disabling long mode.
         #[inline]
         pub unsafe fn write_raw(flags: u64) {
-            Self::MSR.write(flags);
+            let mut msr = Self::MSR;
+            msr.write(flags);
         }
 
         /// Update EFER flags.
@@ -221,7 +222,8 @@ mod x86_64 {
         /// Write a given virtual address to the FS.Base register.
         #[inline]
         pub fn write(address: VirtAddr) {
-            unsafe { Self::MSR.write(address.as_u64()) };
+            let mut msr = Self::MSR;
+            unsafe { msr.write(address.as_u64()) };
         }
     }
 
@@ -235,7 +237,8 @@ mod x86_64 {
         /// Write a given virtual address to the GS.Base register.
         #[inline]
         pub fn write(address: VirtAddr) {
-            unsafe { Self::MSR.write(address.as_u64()) };
+            let mut msr = Self::MSR;
+            unsafe { msr.write(address.as_u64()) };
         }
     }
 
@@ -249,7 +252,8 @@ mod x86_64 {
         /// Write a given virtual address to the KernelGsBase register.
         #[inline]
         pub fn write(address: VirtAddr) {
-            unsafe { Self::MSR.write(address.as_u64()) };
+            let mut msr = Self::MSR;
+            unsafe { msr.write(address.as_u64()) };
         }
     }
 
@@ -316,7 +320,8 @@ mod x86_64 {
             let mut msr_value = 0u64;
             msr_value.set_bits(48..64, sysret.into());
             msr_value.set_bits(32..48, syscall.into());
-            Self::MSR.write(msr_value);
+            let mut msr = Self::MSR;
+            msr.write(msr_value);
         }
 
         /// Write the Ring 0 and Ring 3 segment bases.
@@ -366,7 +371,8 @@ mod x86_64 {
         /// This holds the target RIP of a syscall.
         #[inline]
         pub fn write(address: VirtAddr) {
-            unsafe { Self::MSR.write(address.as_u64()) };
+            let mut msr = Self::MSR;
+            unsafe { msr.write(address.as_u64()) };
         }
     }
 
@@ -392,7 +398,8 @@ mod x86_64 {
         /// to 0, the corresponding rFLAGS bit is not modified.
         #[inline]
         pub fn write(value: RFlags) {
-            unsafe { Self::MSR.write(value.bits()) };
+            let mut msr = Self::MSR;
+            unsafe { msr.write(value.bits()) };
         }
     }
 }