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RuoqingHerbradford
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riscv64: Disable get_reg_list doc test
Limit `get_reg_list` doc example to run on ARM64 only, since `get_reg_list` is for ARM64 and RISC-V64 but 500 registers are too big for RISC-V (a value between 180~200). Signed-off-by: Ruoqing He <[email protected]>
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src/ioctls/vcpu.rs

Lines changed: 10 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -1212,14 +1212,17 @@ impl VcpuFd {
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/// let vm = kvm.create_vm().unwrap();
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/// let vcpu = vm.create_vcpu(0).unwrap();
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///
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/// // KVM_GET_REG_LIST demands that the vcpus be initalized.
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/// let mut kvi: kvm_bindings::kvm_vcpu_init = kvm_bindings::kvm_vcpu_init::default();
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/// vm.get_preferred_target(&mut kvi).unwrap();
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/// vcpu.vcpu_init(&kvi).expect("Cannot initialize vcpu");
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/// // KVM_GET_REG_LIST on Aarch64 demands that the vcpus be initialized.
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/// #[cfg(any(target_arch = "arm", target_arch = "aarch64"))]
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/// {
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/// let mut kvi: kvm_bindings::kvm_vcpu_init = kvm_bindings::kvm_vcpu_init::default();
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/// vm.get_preferred_target(&mut kvi).unwrap();
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/// vcpu.vcpu_init(&kvi).expect("Cannot initialize vcpu");
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///
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/// let mut reg_list = RegList::new(500).unwrap();
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/// vcpu.get_reg_list(&mut reg_list).unwrap();
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/// assert!(reg_list.as_fam_struct_ref().n > 0);
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/// let mut reg_list = RegList::new(500).unwrap();
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/// vcpu.get_reg_list(&mut reg_list).unwrap();
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/// assert!(reg_list.as_fam_struct_ref().n > 0);
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/// }
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/// ```
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#[cfg(any(target_arch = "arm", target_arch = "aarch64", target_arch = "riscv64"))]
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pub fn get_reg_list(&self, reg_list: &mut RegList) -> Result<()> {

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