diff --git a/hv-headers/hvhdk.h b/hv-headers/hvhdk.h index 1b15c643..c93d1f0f 100644 --- a/hv-headers/hvhdk.h +++ b/hv-headers/hvhdk.h @@ -1378,6 +1378,7 @@ union hv_partition_processor_xsave_features { }; #define HV_PARTITION_PROCESSOR_FEATURES_BANKS 2 +#define HV_PARTITION_PROCESSOR_FEATURES_RESERVEDBANK1_BITFIELD_COUNT 4 union hv_partition_processor_features { @@ -1496,8 +1497,22 @@ union hv_partition_processor_features { __u64 sve_sha3 : 1; __u64 sve_sm4 : 1; __u64 e0_pd : 1; + __u64 gpa3:1; + __u64 apa3_base:1; // ID_AA64ISAR2_EL1.APA3 == 0b0001, Only one APA3 bit may be set at once + __u64 apa3_ep:1; // ID_AA64ISAR2_EL1.APA3 == 0b0010, Only one APA3 bit may be set at once + __u64 apa3_ep2:1; // ID_AA64ISAR2_EL1.APA3 == 0b0011, Only one APA3 bit may be set at once + __u64 apa3_ep2_fp:1; // ID_AA64ISAR2_EL1.APA3 == 0b0100, Only one APA3 bit may be set at once + __u64 apa3_ep2_fpc:1; // ID_AA64ISAR2_EL1.APA3 == 0b0101, Only one APA3 bit may be set at once + __u64 lrcpc3:1; // ID_AA64ISAR1_EL1.LRCPC >= 0b0011 + __u64 sme:1; // ID_AA64PFR1_EL1.SME >= 0b0001 + __u64 sme_f32_f32:1; // ID_AA64PFR1_EL1.F32F32 >= 0b0001 + __u64 sme_b16_f32:1; // ID_AA64PFR1_EL1.B16F32 >= 0b0001 + __u64 sme_f16_f32:1; // ID_AA64PFR1_EL1.F16F32 >= 0b0001 + __u64 sme_i8_i32:1; // ID_AA64PFR1_EL1.I8I32 >= 0b0001 + __u64 sme_f64_f64:1; // ID_AA64PFR1_EL1.F64F64 >= 0b0001 + __u64 sme_i16_i64:1; // ID_AA64PFR1_EL1.I16I64 >= 0b0001 /* Remaining reserved bits */ - __u64 reserved_bank1 : 18; + __u64 reserved_bank1 : HV_PARTITION_PROCESSOR_FEATURES_RESERVEDBANK1_BITFIELD_COUNT; } __packed; #elif defined(__x86_64__) @@ -1630,8 +1645,8 @@ union hv_partition_processor_features { __u64 tsa_l1_no_supported : 1; __u64 tsa_sq_no_supported : 1; __u64 lass_support : 1; - /* Remaining reserved bits */ - __u64 reserved_bank1 : 2; + __u64 idle_hlt_intercept_support : 1; + __u64 msr_list_support : 1; } __packed; #endif }; diff --git a/mshv-bindings/src/arm64/bindings.rs b/mshv-bindings/src/arm64/bindings.rs index b67d4598..336eeafb 100755 --- a/mshv-bindings/src/arm64/bindings.rs +++ b/mshv-bindings/src/arm64/bindings.rs @@ -281,6 +281,7 @@ pub const HV_TRANSLATE_GVA_PAN_CLEAR: u32 = 512; pub const HV_PSP_CPUID_LEAF_COUNT_MAX: u32 = 64; pub const HV_READ_WRITE_GPA_MAX_SIZE: u32 = 16; pub const HV_PARTITION_PROCESSOR_FEATURES_BANKS: u32 = 2; +pub const HV_PARTITION_PROCESSOR_FEATURES_RESERVEDBANK1_BITFIELD_COUNT: u32 = 4; pub const MSHV_IOCTL: u32 = 184; pub const MSHV_VP_MAX_REGISTERS: u32 = 128; pub const MSHV_NUM_CPU_FEATURES_BANKS: u32 = 2; @@ -17507,14 +17508,476 @@ impl hv_partition_processor_features__bindgen_ty_1 { } } #[inline] + pub fn gpa3(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(110usize, 1u8) as u64) } + } + #[inline] + pub fn set_gpa3(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(110usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn gpa3_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 110usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_gpa3_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 110usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn apa3_base(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(111usize, 1u8) as u64) } + } + #[inline] + pub fn set_apa3_base(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(111usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn apa3_base_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 111usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_apa3_base_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 111usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn apa3_ep(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(112usize, 1u8) as u64) } + } + #[inline] + pub fn set_apa3_ep(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(112usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn apa3_ep_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 112usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_apa3_ep_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 112usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn apa3_ep2(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(113usize, 1u8) as u64) } + } + #[inline] + pub fn set_apa3_ep2(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(113usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn apa3_ep2_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 113usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_apa3_ep2_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 113usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn apa3_ep2_fp(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(114usize, 1u8) as u64) } + } + #[inline] + pub fn set_apa3_ep2_fp(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(114usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn apa3_ep2_fp_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 114usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_apa3_ep2_fp_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 114usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn apa3_ep2_fpc(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(115usize, 1u8) as u64) } + } + #[inline] + pub fn set_apa3_ep2_fpc(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(115usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn apa3_ep2_fpc_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 115usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_apa3_ep2_fpc_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 115usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn lrcpc3(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(116usize, 1u8) as u64) } + } + #[inline] + pub fn set_lrcpc3(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(116usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn lrcpc3_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 116usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_lrcpc3_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 116usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(117usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(117usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 117usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 117usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme_f32_f32(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(118usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme_f32_f32(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(118usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_f32_f32_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 118usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_f32_f32_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 118usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme_b16_f32(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(119usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme_b16_f32(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(119usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_b16_f32_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 119usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_b16_f32_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 119usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme_f16_f32(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(120usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme_f16_f32(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(120usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_f16_f32_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 120usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_f16_f32_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 120usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme_i8_i32(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(121usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme_i8_i32(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(121usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_i8_i32_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 121usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_i8_i32_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 121usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme_f64_f64(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(122usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme_f64_f64(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(122usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_f64_f64_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 122usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_f64_f64_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 122usize, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn sme_i16_i64(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(123usize, 1u8) as u64) } + } + #[inline] + pub fn set_sme_i16_i64(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(123usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn sme_i16_i64_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 123usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_sme_i16_i64_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 123usize, + 1u8, + val as u64, + ) + } + } + #[inline] pub fn reserved_bank1(&self) -> __u64 { - unsafe { ::std::mem::transmute(self._bitfield_1.get(110usize, 18u8) as u64) } + unsafe { ::std::mem::transmute(self._bitfield_1.get(124usize, 4u8) as u64) } } #[inline] pub fn set_reserved_bank1(&mut self, val: __u64) { unsafe { let val: u64 = ::std::mem::transmute(val); - self._bitfield_1.set(110usize, 18u8, val as u64) + self._bitfield_1.set(124usize, 4u8, val as u64) } } #[inline] @@ -17522,8 +17985,8 @@ impl hv_partition_processor_features__bindgen_ty_1 { unsafe { ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), - 110usize, - 18u8, + 124usize, + 4u8, ) as u64) } } @@ -17533,8 +17996,8 @@ impl hv_partition_processor_features__bindgen_ty_1 { let val: u64 = ::std::mem::transmute(val); <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), - 110usize, - 18u8, + 124usize, + 4u8, val as u64, ) } @@ -17651,6 +18114,20 @@ impl hv_partition_processor_features__bindgen_ty_1 { sve_sha3: __u64, sve_sm4: __u64, e0_pd: __u64, + gpa3: __u64, + apa3_base: __u64, + apa3_ep: __u64, + apa3_ep2: __u64, + apa3_ep2_fp: __u64, + apa3_ep2_fpc: __u64, + lrcpc3: __u64, + sme: __u64, + sme_f32_f32: __u64, + sme_b16_f32: __u64, + sme_f16_f32: __u64, + sme_i8_i32: __u64, + sme_f64_f64: __u64, + sme_i16_i64: __u64, reserved_bank1: __u64, ) -> __BindgenBitfieldUnit<[u8; 16usize]> { let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 16usize]> = Default::default(); @@ -18094,7 +18571,63 @@ impl hv_partition_processor_features__bindgen_ty_1 { let e0_pd: u64 = unsafe { ::std::mem::transmute(e0_pd) }; e0_pd as u64 }); - __bindgen_bitfield_unit.set(110usize, 18u8, { + __bindgen_bitfield_unit.set(110usize, 1u8, { + let gpa3: u64 = unsafe { ::std::mem::transmute(gpa3) }; + gpa3 as u64 + }); + __bindgen_bitfield_unit.set(111usize, 1u8, { + let apa3_base: u64 = unsafe { ::std::mem::transmute(apa3_base) }; + apa3_base as u64 + }); + __bindgen_bitfield_unit.set(112usize, 1u8, { + let apa3_ep: u64 = unsafe { ::std::mem::transmute(apa3_ep) }; + apa3_ep as u64 + }); + __bindgen_bitfield_unit.set(113usize, 1u8, { + let apa3_ep2: u64 = unsafe { ::std::mem::transmute(apa3_ep2) }; + apa3_ep2 as u64 + }); + __bindgen_bitfield_unit.set(114usize, 1u8, { + let apa3_ep2_fp: u64 = unsafe { ::std::mem::transmute(apa3_ep2_fp) }; + apa3_ep2_fp as u64 + }); + __bindgen_bitfield_unit.set(115usize, 1u8, { + let apa3_ep2_fpc: u64 = unsafe { ::std::mem::transmute(apa3_ep2_fpc) }; + apa3_ep2_fpc as u64 + }); + __bindgen_bitfield_unit.set(116usize, 1u8, { + let lrcpc3: u64 = unsafe { ::std::mem::transmute(lrcpc3) }; + lrcpc3 as u64 + }); + __bindgen_bitfield_unit.set(117usize, 1u8, { + let sme: u64 = unsafe { ::std::mem::transmute(sme) }; + sme as u64 + }); + __bindgen_bitfield_unit.set(118usize, 1u8, { + let sme_f32_f32: u64 = unsafe { ::std::mem::transmute(sme_f32_f32) }; + sme_f32_f32 as u64 + }); + __bindgen_bitfield_unit.set(119usize, 1u8, { + let sme_b16_f32: u64 = unsafe { ::std::mem::transmute(sme_b16_f32) }; + sme_b16_f32 as u64 + }); + __bindgen_bitfield_unit.set(120usize, 1u8, { + let sme_f16_f32: u64 = unsafe { ::std::mem::transmute(sme_f16_f32) }; + sme_f16_f32 as u64 + }); + __bindgen_bitfield_unit.set(121usize, 1u8, { + let sme_i8_i32: u64 = unsafe { ::std::mem::transmute(sme_i8_i32) }; + sme_i8_i32 as u64 + }); + __bindgen_bitfield_unit.set(122usize, 1u8, { + let sme_f64_f64: u64 = unsafe { ::std::mem::transmute(sme_f64_f64) }; + sme_f64_f64 as u64 + }); + __bindgen_bitfield_unit.set(123usize, 1u8, { + let sme_i16_i64: u64 = unsafe { ::std::mem::transmute(sme_i16_i64) }; + sme_i16_i64 as u64 + }); + __bindgen_bitfield_unit.set(124usize, 4u8, { let reserved_bank1: u64 = unsafe { ::std::mem::transmute(reserved_bank1) }; reserved_bank1 as u64 }); diff --git a/mshv-bindings/src/x86_64/bindings.rs b/mshv-bindings/src/x86_64/bindings.rs index 2f127f5b..b0c1ee8f 100644 --- a/mshv-bindings/src/x86_64/bindings.rs +++ b/mshv-bindings/src/x86_64/bindings.rs @@ -349,6 +349,7 @@ pub const HV_GPA_ATTRIBUTE_INTERCEPT_MAX_RANGES: u32 = 29; pub const HV_PSP_CPUID_LEAF_COUNT_MAX: u32 = 64; pub const HV_READ_WRITE_GPA_MAX_SIZE: u32 = 16; pub const HV_PARTITION_PROCESSOR_FEATURES_BANKS: u32 = 2; +pub const HV_PARTITION_PROCESSOR_FEATURES_RESERVEDBANK1_BITFIELD_COUNT: u32 = 4; pub const MSHV_IOCTL: u32 = 184; pub const MSHV_VP_MAX_REGISTERS: u32 = 128; pub const MSHV_NUM_CPU_FEATURES_BANKS: u32 = 2; @@ -20507,34 +20508,67 @@ impl hv_partition_processor_features__bindgen_ty_1 { } } #[inline] - pub fn reserved_bank1(&self) -> __u64 { - unsafe { ::std::mem::transmute(self._bitfield_1.get(126usize, 2u8) as u64) } + pub fn idle_hlt_intercept_support(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(126usize, 1u8) as u64) } } #[inline] - pub fn set_reserved_bank1(&mut self, val: __u64) { + pub fn set_idle_hlt_intercept_support(&mut self, val: __u64) { unsafe { let val: u64 = ::std::mem::transmute(val); - self._bitfield_1.set(126usize, 2u8, val as u64) + self._bitfield_1.set(126usize, 1u8, val as u64) } } #[inline] - pub unsafe fn reserved_bank1_raw(this: *const Self) -> __u64 { + pub unsafe fn idle_hlt_intercept_support_raw(this: *const Self) -> __u64 { unsafe { ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( ::std::ptr::addr_of!((*this)._bitfield_1), 126usize, - 2u8, + 1u8, ) as u64) } } #[inline] - pub unsafe fn set_reserved_bank1_raw(this: *mut Self, val: __u64) { + pub unsafe fn set_idle_hlt_intercept_support_raw(this: *mut Self, val: __u64) { unsafe { let val: u64 = ::std::mem::transmute(val); <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( ::std::ptr::addr_of_mut!((*this)._bitfield_1), 126usize, - 2u8, + 1u8, + val as u64, + ) + } + } + #[inline] + pub fn msr_list_support(&self) -> __u64 { + unsafe { ::std::mem::transmute(self._bitfield_1.get(127usize, 1u8) as u64) } + } + #[inline] + pub fn set_msr_list_support(&mut self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + self._bitfield_1.set(127usize, 1u8, val as u64) + } + } + #[inline] + pub unsafe fn msr_list_support_raw(this: *const Self) -> __u64 { + unsafe { + ::std::mem::transmute(<__BindgenBitfieldUnit<[u8; 16usize]>>::raw_get( + ::std::ptr::addr_of!((*this)._bitfield_1), + 127usize, + 1u8, + ) as u64) + } + } + #[inline] + pub unsafe fn set_msr_list_support_raw(this: *mut Self, val: __u64) { + unsafe { + let val: u64 = ::std::mem::transmute(val); + <__BindgenBitfieldUnit<[u8; 16usize]>>::raw_set( + ::std::ptr::addr_of_mut!((*this)._bitfield_1), + 127usize, + 1u8, val as u64, ) } @@ -20667,7 +20701,8 @@ impl hv_partition_processor_features__bindgen_ty_1 { tsa_l1_no_supported: __u64, tsa_sq_no_supported: __u64, lass_support: __u64, - reserved_bank1: __u64, + idle_hlt_intercept_support: __u64, + msr_list_support: __u64, ) -> __BindgenBitfieldUnit<[u8; 16usize]> { let mut __bindgen_bitfield_unit: __BindgenBitfieldUnit<[u8; 16usize]> = Default::default(); __bindgen_bitfield_unit.set(0usize, 1u8, { @@ -21204,9 +21239,14 @@ impl hv_partition_processor_features__bindgen_ty_1 { let lass_support: u64 = unsafe { ::std::mem::transmute(lass_support) }; lass_support as u64 }); - __bindgen_bitfield_unit.set(126usize, 2u8, { - let reserved_bank1: u64 = unsafe { ::std::mem::transmute(reserved_bank1) }; - reserved_bank1 as u64 + __bindgen_bitfield_unit.set(126usize, 1u8, { + let idle_hlt_intercept_support: u64 = + unsafe { ::std::mem::transmute(idle_hlt_intercept_support) }; + idle_hlt_intercept_support as u64 + }); + __bindgen_bitfield_unit.set(127usize, 1u8, { + let msr_list_support: u64 = unsafe { ::std::mem::transmute(msr_list_support) }; + msr_list_support as u64 }); __bindgen_bitfield_unit } diff --git a/mshv-ioctls/src/ioctls/system.rs b/mshv-ioctls/src/ioctls/system.rs index 838fe449..d8854951 100644 --- a/mshv-ioctls/src/ioctls/system.rs +++ b/mshv-ioctls/src/ioctls/system.rs @@ -67,12 +67,7 @@ pub fn make_default_partition_create_arg(vm_type: VmType) -> mshv_create_partiti let mut disabled_proc_features = hv_partition_processor_features::default(); let mut disabled_xsave_features = hv_partition_processor_xsave_features::default(); - for i in 0..MSHV_NUM_CPU_FEATURES_BANKS { - // SAFETY: access union fields - unsafe { - disabled_proc_features.as_uint64[i as usize] = 0xFFFFFFFFFFFFFFFF; - } - } + disabled_xsave_features.as_uint64 = 0xFFFFFFFFFFFFFFFF; #[cfg(target_arch = "x86_64")] @@ -95,241 +90,22 @@ pub fn make_default_partition_create_arg(vm_type: VmType) -> mshv_create_partiti .__bindgen_anon_1 .set_xsaveopt_support(0u64); create_args.pt_disabled_xsave = disabled_xsave_features.as_uint64; - - // Enable default processor features that are known to be supported - disabled_proc_features - .__bindgen_anon_1 - .set_adx_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_aes_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_altmovcr8_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_amd3dnow_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_bhi_dis_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_bhi_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_bmi1_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_bmi2_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_btc_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_cet_ibt_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_cet_ss_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_clflushopt_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_cmpxchg16b_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_dep_x87_fpu_save_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_enhanced_fast_string_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_extended_amd3dnow_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_f16c_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_fast_short_rep_mov_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_fb_clear_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_fma4_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_gds_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_hle_support_deprecated(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_hle_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_ibpb_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_ibrs_all_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_ibrs_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_intel_prefetch_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_invpcid_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_l1dcache_flush_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_lahf_sahf_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_lzcnt_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mb_clear_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mbec_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mbs_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mdd_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mis_align_sse_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mitigation_ctrl_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_mmx_ext_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_movbe_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_npiep1_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_page_1gb_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_pclmulqdq_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_pcid_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_pop_cnt_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_psfd_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rd_pid_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rd_rand_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rd_rand_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rd_seed_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rd_wr_fs_gs_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rdcl_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rdpru_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rdtscp_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rfds_clear_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rfds_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rsb_a_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rtm_support_deprecated(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_rtm_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_skip_l1df_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_smap_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_smep_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_ssb_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_sse3_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_sse4_1_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_sse4_2_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_sse4a_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_ssse3_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_stibp_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_taa_no_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_tsc_invariant_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_tsx_ctrl_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_umip_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_unrestricted_guest_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_virt_spec_ctrl_support(0u64); - disabled_proc_features - .__bindgen_anon_1 - .set_vmx_exception_inject_support(0u64); + // Enable all processor features by default for x86_64 + for i in 0..MSHV_NUM_CPU_FEATURES_BANKS { + disabled_proc_features.as_uint64[i as usize] = 0u64; + } disabled_proc_features .__bindgen_anon_1 - .set_xop_support(0u64); + .set_reserved_bank0(1u64); } #[cfg(target_arch = "aarch64")] // SAFETY: access union fields unsafe { + // Disable all processor features by default for ARM64 + for i in 0..MSHV_NUM_CPU_FEATURES_BANKS { + disabled_proc_features.as_uint64[i as usize] = 0xFFFFFFFFFFFFFFFF; + } // This must always be enabled for ARM64 guests. disabled_proc_features.__bindgen_anon_1.set_gic_v3v4(0u64);