diff --git a/.crates.toml b/.crates.toml index 86b5390..bc6234a 100644 --- a/.crates.toml +++ b/.crates.toml @@ -1,2 +1,2 @@ [v1] -"galette 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)" = ["galette"] +"galette 0.3.0 (git+https://github.com/rustbox/galette.git?rev=2ba00658608c4e4d1fd51d903a7799dcabe2f9cc#2ba00658608c4e4d1fd51d903a7799dcabe2f9cc)" = ["galette"] diff --git a/.crates2.json b/.crates2.json index 7e99875..7bc2533 100644 --- a/.crates2.json +++ b/.crates2.json @@ -1 +1 @@ -{"installs":{"galette 0.3.0 (registry+https://github.com/rust-lang/crates.io-index)":{"version_req":"0.3.0","bins":["galette"],"features":[],"all_features":false,"no_default_features":false,"profile":"release","target":"x86_64-unknown-linux-gnu","rustc":"rustc 1.62.1 (e092d0b6b 2022-07-16)\nbinary: rustc\ncommit-hash: e092d0b6b43f2de967af0887873151bb1c0b18d3\ncommit-date: 2022-07-16\nhost: x86_64-unknown-linux-gnu\nrelease: 1.62.1\nLLVM version: 14.0.5\n"}}} \ No newline at end of file +{"installs":{"galette 0.3.0 (git+https://github.com/rustbox/galette.git?rev=2ba00658608c4e4d1fd51d903a7799dcabe2f9cc#2ba00658608c4e4d1fd51d903a7799dcabe2f9cc)":{"version_req":null,"bins":["galette"],"features":[],"all_features":false,"no_default_features":false,"profile":"release","target":"x86_64-unknown-linux-gnu","rustc":"rustc 1.62.1 (e092d0b6b 2022-07-16)\nbinary: rustc\ncommit-hash: e092d0b6b43f2de967af0887873151bb1c0b18d3\ncommit-date: 2022-07-16\nhost: x86_64-unknown-linux-gnu\nrelease: 1.62.1\nLLVM version: 14.0.5\n"}}} \ No newline at end of file diff --git a/GAL16V8_counter8.chp b/GAL16V8_counter8.chp new file mode 100644 index 0000000..bbcc7ef --- /dev/null +++ b/GAL16V8_counter8.chp @@ -0,0 +1,25 @@ + + + GAL16V8 + + -------\___/------- + Clock | 1 20 | VCC + | | + NC | 2 19 | Q0 + | | + NC | 3 18 | Q1 + | | + NC | 4 17 | Q2 + | | + NC | 5 16 | Q3 + | | + NC | 6 15 | Q4 + | | + NC | 7 14 | Q5 + | | + NC | 8 13 | Q6 + | | + R | 9 12 | Q7 + | | + GND | 10 11 | /OE + ------------------- diff --git a/GAL16V8_counter8.jed b/GAL16V8_counter8.jed new file mode 100644 index 0000000..8f0c6fa --- /dev/null +++ b/GAL16V8_counter8.jed @@ -0,0 +1,52 @@ + +GAL-Assembler: Galette 0.3.0 +Device: GAL16V8 + +*F0 +*G0 +*QF2194 +*L0000 11101111111111111111111111111111 +*L0256 11011110111111111111111111111111 +*L0288 11101101111111111111111111111111 +*L0512 11011101111011111111111111111111 +*L0544 11111110110111111111111111111111 +*L0576 11101111110111111111111111111111 +*L0768 11011101110111101111111111111111 +*L0800 11111111111011011111111111111111 +*L0832 11111110111111011111111111111111 +*L0864 11101111111111011111111111111111 +*L1024 11011101110111011110111111111111 +*L1056 11111111110111101111111111111111 +*L1088 11111111110011111111111111111111 +*L1120 11111110110111111111111111111111 +*L1152 11101111110111111111111111111111 +*L1280 11011101110111011101111011111111 +*L1312 11111111111111111110110111111111 +*L1344 11111111111111101111110111111111 +*L1376 11111111111011111111110111111111 +*L1408 11111110111111111111110111111111 +*L1440 11101111111111111111110111111111 +*L1536 11011101110111011101110111101111 +*L1568 11111111111111111111111011011111 +*L1600 11111111111111111110111111011111 +*L1632 11111111111111101111111111011111 +*L1664 11111111111011111111111111011111 +*L1696 11111110111111111111111111011111 +*L1728 11101111111111111111111111011111 +*L1792 11011101110111011101110111011110 +*L1824 11111111111111111111111111101101 +*L1856 11111111111111111111111011111101 +*L1888 11111111111111111110111111111101 +*L1920 11111111111111101111111111111101 +*L1952 11111111111011111111111111111101 +*L1984 11111110111111111111111111111101 +*L2016 11101111111111111111111111111101 +*L2048 11111111 +*L2056 0100001101101111011101010110111001110100011001010111001000000000 +*L2120 00000000 +*L2128 1111111111111111111111111111111111111111111111111111111111111111 +*L2192 0 +*L2193 1 +*C8c57 +* +4718 diff --git a/GAL16V8_counter8.pin b/GAL16V8_counter8.pin new file mode 100644 index 0000000..7b78319 --- /dev/null +++ b/GAL16V8_counter8.pin @@ -0,0 +1,25 @@ + + + Pin # | Name | Pin Type +----------------------------- + 1 | Clock | Clock + 2 | NC | Input + 3 | NC | Input + 4 | NC | Input + 5 | NC | Input + 6 | NC | Input + 7 | NC | Input + 8 | NC | Input + 9 | R | Input + 10 | GND | GND + 11 | /OE | /OE + 12 | Q7 | Output + 13 | Q6 | Output + 14 | Q5 | Output + 15 | Q4 | Output + 16 | Q3 | Output + 17 | Q2 | Output + 18 | Q1 | Output + 19 | Q0 | Output + 20 | VCC | VCC + diff --git a/GAL16V8_counter8.pld b/GAL16V8_counter8.pld new file mode 100644 index 0000000..5f54158 --- /dev/null +++ b/GAL16V8_counter8.pld @@ -0,0 +1,88 @@ +GAL16V8 +Counter + +Clock NC NC NC NC NC NC NC R GND +/OE Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 VCC + +Q0.R = /Q0 + +; 0 1 +; 1 0 +Q1.R = /Q1 * Q0 + Q1 * /Q0 + +; 0 1 1 +; 1 0 x +; 1 x 0 +Q2.R = /Q2*Q1*Q0 + + Q2 * /Q1 + + Q2 * /Q0 + +; 0 1 1 1 +; 1 0 x x +; 1 x 0 x +; 1 x x 0 +Q3.R = /Q3*Q2*Q1*Q0 + + Q3 * /Q2 + + Q3 * /Q1 + + Q3 * /Q0 + +; 0 1 1 1 1 +; 1 0 x x x +; 1 x 0 x x +; 1 x x 0 x +; 1 x x x 0 +Q4.R = /Q4*Q3*Q2*Q1*Q0 + + Q2 * /Q3 + + Q2 * /Q2 + + Q2 * /Q1 + + Q2 * /Q0 + +; 0 1 1 1 1 1 +; 1 0 x x x x +; 1 x 0 x x x +; 1 x x 0 x x +; 1 x x x 0 x +; 1 x x x x 0 +Q5.R = /Q5*Q4*Q3*Q2*Q1*Q0 + + Q5 * /Q4 + + Q5 * /Q3 + + Q5 * /Q2 + + Q5 * /Q1 + + Q5 * /Q0 + +; 0 1 1 1 1 1 1 +; 1 0 x x x x x +; 1 x 0 x x x x +; 1 x x 0 x x x +; 1 x x x 0 x x +; 1 x x x x 0 x +; 1 x x x x x 0 +Q6.R = /Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q6 * /Q5 + + Q6 * /Q4 + + Q6 * /Q3 + + Q6 * /Q2 + + Q6 * /Q1 + + Q6 * /Q0 + +; 0 1 1 1 1 1 1 1 +; 1 0 x x x x x x +; 1 x 0 x x x x x +; 1 x x 0 x x x x +; 1 x x x 0 x x x +; 1 x x x x 0 x x +; 1 x x x x x 0 x +; 1 x x x x x x 0 +Q7.R = /Q7*Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q7 * /Q6 + + Q7 * /Q5 + + Q7 * /Q4 + + Q7 * /Q3 + + Q7 * /Q2 + + Q7 * /Q1 + + Q7 * /Q0 + + +DESCRIPTION + +8 bit counter diff --git a/GAL16V8_horizontal.chp b/GAL16V8_horizontal.chp index ee9c3d4..dd0dca6 100644 --- a/GAL16V8_horizontal.chp +++ b/GAL16V8_horizontal.chp @@ -3,23 +3,23 @@ GAL16V8 -------\___/------- - A9 | 1 20 | VCC + Clock | 1 20 | VCC | | - A8 | 2 19 | HzVis + Q5 | 2 19 | HVis | | - A7 | 3 18 | Hsync + NC | 3 18 | Hsync | | - A6 | 4 17 | EndL + NC | 4 17 | EndL | | - A5 | 5 16 | NC + NC | 5 16 | Q6 | | - A4 | 6 15 | NC + NC | 6 15 | Q7 | | - A3 | 7 14 | NC + NC | 7 14 | Q8 | | - A2 | 8 13 | A0 + NC | 8 13 | Q9 | | - A1 | 9 12 | NC + NC | 9 12 | Q10 | | GND | 10 11 | NC ------------------- diff --git a/GAL16V8_horizontal.jed b/GAL16V8_horizontal.jed index 0c550dd..9d845ef 100644 --- a/GAL16V8_horizontal.jed +++ b/GAL16V8_horizontal.jed @@ -5,21 +5,42 @@ Device: GAL16V8 *F0 *G0 *QF2194 -*L0000 11101011101111111111111111111111 -*L0032 10101111111111111111111111111111 -*L0256 11111111111101110111011111111111 -*L0288 11111111111110111011101111111111 -*L0320 11111111101111111111111111111111 -*L0352 11110111111111111111111111111111 -*L0384 10111111111111111111111111111111 -*L0416 11011111111111111111111111111111 -*L0512 01100111101110110111101010111011 -*L2048 11100000 +*L0000 11111111111111111111111111111110 +*L0032 11111111111111111111111011101101 +*L0064 10111111111111011110111011011101 +*L0256 01111111111111101110110111101101 +*L0288 10111111111111011110110111101101 +*L0320 01111111111111011110110111101101 +*L0352 10111111111111101101110111101101 +*L0384 01111111111111101101110111101101 +*L0416 10111111111111011101110111101101 +*L0512 01111111111111101110111011011101 +*L0768 01111111111011101111111111111111 +*L0800 10111111111011011111111111111111 +*L1024 01111111111011011110111111111111 +*L1056 11111111111011101101111111111111 +*L1088 10111111111011011101111111111111 +*L1280 01111111111011011101111011111111 +*L1312 11111111111011111110110111111111 +*L1344 11111111111011101101110111111111 +*L1376 10111111111011011101110111111111 +*L1536 01111111111011011101110111101111 +*L1568 11111111111011111111111011011111 +*L1600 11111111111011111110110111011111 +*L1632 11111111111011101101110111011111 +*L1664 10111111111011011101110111011111 +*L1792 01111111111011011101110111011110 +*L1824 11111111111011111111111111101101 +*L1856 11111111111011111111111011011101 +*L1888 11111111111011111110110111011101 +*L1920 11111111111011101101110111011101 +*L1952 10111111111011011101110111011101 +*L2048 10111111 *L2056 0100100001101111011100100110100101111010011011110110111001110100 -*L2120 00000010 +*L2120 00000000 *L2128 1111111111111111111111111111111111111111111111111111111111111111 -*L2192 1 -*L2193 0 -*C2e53 +*L2192 0 +*L2193 1 +*C6f34 * -7b37 +1976 diff --git a/GAL16V8_horizontal.pin b/GAL16V8_horizontal.pin index 108ab65..9262f27 100644 --- a/GAL16V8_horizontal.pin +++ b/GAL16V8_horizontal.pin @@ -2,24 +2,24 @@ Pin # | Name | Pin Type ----------------------------- - 1 | A9 | Input - 2 | A8 | Input - 3 | A7 | Input - 4 | A6 | Input - 5 | A5 | Input - 6 | A4 | Input - 7 | A3 | Input - 8 | A2 | Input - 9 | A1 | Input + 1 | Clock | Clock + 2 | Q5 | Input + 3 | NC | Input + 4 | NC | Input + 5 | NC | Input + 6 | NC | Input + 7 | NC | Input + 8 | NC | Input + 9 | NC | Input 10 | GND | GND - 11 | NC | Input - 12 | NC | NC - 13 | A0 | Input - 14 | NC | NC - 15 | NC | NC - 16 | NC | NC + 11 | NC | /OE + 12 | Q10 | Output + 13 | Q9 | Output + 14 | Q8 | Output + 15 | Q7 | Output + 16 | Q6 | Output 17 | EndL | Output 18 | Hsync | Output - 19 | HzVis | Output + 19 | HVis | Output 20 | VCC | VCC diff --git a/GAL16V8_horizontal.pld b/GAL16V8_horizontal.pld index f23d96c..2b39771 100644 --- a/GAL16V8_horizontal.pld +++ b/GAL16V8_horizontal.pld @@ -1,16 +1,98 @@ GAL16V8 Horizontal -A9 A8 A7 A6 A5 A4 A3 A2 A1 GND -NC NC A0 NC NC NC EndL Hsync HzVis VCC +Clock Q5 NC NC NC NC NC NC NC GND +NC Q10 Q9 Q8 Q7 Q6 EndL Hsync HVis VCC -HzVis = /A6 * /A7 * /A9 + /A8 * /A9 -Hsync = A3 * A4 * A5 + /A3 * /A4 * /A5 + /A6 + A7 + /A8 + A9 -EndL = /A0 * /A1 * /A2 * /A3 * A4 * /A5 * /A6 * A7 * A8 * /A9 +; A synchronous counter (clocked by Q4). + +; We take Q5 as input to preserve an output for HVis, +; at the cost of needing a 5-bit input, registering all +; the outputs and introducing an off-by-one issue at the +; counter reset, see below. +; +; To switch to a 4-bit input, replace HVis with Q5, +; uncomment this line, and de-register (delete the .R +; suffix from) HSync and EndL. +; +; Q5.R = /Q5 * /EndL + +Q6.R = /Q6 * Q5 * /EndL + + Q6 * /Q5 * /EndL +Q7.R = /Q7 * Q6 * Q5 * /EndL + + Q7 * /Q6 * /EndL + + Q7 * Q6 * /Q5 * /EndL +Q8.R = /Q8 * Q7 * Q6 * Q5 * /EndL + + Q8 * /Q7 * /EndL + + Q8 * Q7 * /Q6 * /EndL + + Q8 * Q7 * Q6 * /Q5 * /EndL +Q9.R = /Q9 * Q8 * Q7 * Q6 * Q5 * /EndL + + Q9 * /Q8 * /EndL + + Q9 * Q8 * /Q7 * /EndL + + Q9 * Q8 * Q7 * /Q6 * /EndL + + Q9 * Q8 * Q7 * Q6 * /Q5 * /EndL +Q10.R = /Q10 * Q9 * Q8 * Q7 * Q6 * Q5 * /EndL + + Q10 * /Q9 * /EndL + + Q10 * Q9 * /Q8 * /EndL + + Q10 * Q9 * Q8 * /Q7 * /EndL + + Q10 * Q9 * Q8 * Q7 * /Q6 * /EndL + + Q10 * Q9 * Q8 * Q7 * Q6 * /Q5 * /EndL + +; Frame Start + +HVis.R = /Q10 ; 0b0xxxxx D < 32 (32) + + Q10 * /Q9 * /Q8 ; 0b100xxx 32 <= D < 40 ( 8) + ; v fix a little off-by-one, everything's fine + + Q10 * Q9 * /Q8 * /Q7 * Q6 * /Q5 ; + ; ^ 0x110010, alternate spelling of 0b000000, see description + +; Front Porch ; 0b101000 D = 40 ( 1) + +/Hsync.R = Q10 * /Q9 * Q8 * /Q7 * /Q6 * Q5 ; 0b101001 D = 41 ( 1) + + Q10 * /Q9 * Q8 * /Q7 * Q6 * /Q5 ; 0b101010 D = 42 ( 1) + + Q10 * /Q9 * Q8 * /Q7 * Q6 * Q5 ; 0b101011 D = 43 ( 1) + + Q10 * /Q9 * Q8 * Q7 * /Q6 * /Q5 ; 0b101100 D = 44 ( 1) + + Q10 * /Q9 * Q8 * Q7 * /Q6 * Q5 ; 0b101101 D = 45 ( 1) + + Q10 * /Q9 * Q8 * Q7 * Q6 * /Q5 ; 0b101110 D = 46 ( 1) + +; Back Porch ; 0b101111 D = 47 ( 1) + ; 0b11000x 48 <= D < 50 ( 2) + + ; ---- + ; (50) +EndL.R = Q10 * Q9 * /Q8 * /Q7 * /Q6 * Q5 ; 0b110001 D = 49 + +; EndL has to be registered to cover the phase variance +; from Q5, but this does mean we spell zero "50" (0b110010) +; because the reset on {Q10..Q6} is one clock delayed. DESCRIPTION Horizontal timing -HViz: D < 320 -HSync: D >= 328, D < 376 -End: D == 400 \ No newline at end of file + +D = {Q10..Q5} (counting in 16s, 1-indexed LSB) + +HViz: D < 40 (< 0b101000) + (front porch) D = 40 (0b101000) +HSync: D >= 41, D < 46 (0b101001 to 0b101111, so 0b10101x 0b1011xx) + (back porch) D = 47, 48, 49 +EndL: D == 49 (0b110001) + +0..49 is 50 16-pixel blocks in total + +(with Q5 as an input, necessitating registering the EndL output, we actually +count {50,1..49} after the first frame because our reset is delayed one cycle) + +In order to have enough outputs on the V8, we take both the clock (at "Q4" +speed, 1.5734MHz) and LSB of our 6-bit counter "Q5" as inputs. We expect +to be driven by a >=5-bit "ripple" (asynchronous) counter chip, which is +why any output driven by Q5 needs to be registered (because Q5 will be +slightly out of phase with our clock). Since EndL is registered, our reset +is delayed, and HVis has to account for zero being spelled both 0b00000 (0) +and 0b110010 (50). + +One potential modification is to hoist the "hvis" logic over to the vertical +chip (which has room for the 3 inputs at the cost of a distinct VertVis +output), which would allow this chip's logic to be driven only by a 4-bit counter +as the Clock input. In doing so it would be important to de-register EndL so +D counts from 0..49 again (else, HVis needs all 6 bits as input). \ No newline at end of file diff --git a/GAL16V8_vertical.chp b/GAL16V8_vertical.chp index 665ffb8..925cb65 100644 --- a/GAL16V8_vertical.chp +++ b/GAL16V8_vertical.chp @@ -3,7 +3,7 @@ GAL16V8 -------\___/------- - A9 | 1 20 | VCC + Clock | 1 20 | VCC | | A8 | 2 19 | EndF | | @@ -11,11 +11,11 @@ | | A6 | 4 17 | VertVis | | - A5 | 5 16 | VsTemp + A5 | 5 16 | A9 | | A4 | 6 15 | Vis | | - A3 | 7 14 | Hvis + A3 | 7 14 | HVis | | A2 | 8 13 | A0 | | diff --git a/GAL16V8_vertical.jed b/GAL16V8_vertical.jed index d66a1f7..db9a5fa 100644 --- a/GAL16V8_vertical.jed +++ b/GAL16V8_vertical.jed @@ -6,36 +6,27 @@ Device: GAL16V8 *G0 *QF2194 *L0000 11111111111111111111111111111111 -*L0032 10011011101110111011011101011011 +*L0032 10111011101110011011011101011011 *L0256 11111111111111111111111111111111 -*L0288 11111111111111011111111111111111 -*L0320 11111111111110111111111111111111 -*L0352 11111111101111111111111111111111 -*L0384 11111011111111111111111111111111 -*L0416 10111111111111111111111111111111 -*L0448 11011111111111111111111111111111 -*L0512 11111111111111111111111111111111 -*L0544 10101111111101111111011111111111 -*L0576 11101111101101110111101111111111 -*L0608 11100111101111111011111111111111 -*L0640 11100111101110111111111111111111 -*L0672 10101111011111111111111111111111 -*L0704 01101011111111111111111111111111 -*L0768 11111111111111111111111111111111 -*L0800 11111111111111111111111111111011 -*L0832 11111111111111111111111101111111 -*L0864 11111111111111111111101111111111 -*L0896 11111111111111110111111111111111 +*L0288 01110111011101101011011110110111 +*L0512 10111111111101101111011111111111 +*L0544 11111111101101100111101111111111 +*L0576 11110111101111101011111111111111 +*L0608 11110111101110101111111111111111 +*L0640 10111111011111101111111111111111 +*L0672 01111011111111101111111111111111 *L1024 11111111111111111111111111111111 -*L1056 11111111110111111111110111111111 +*L1056 11111111111111111111111011111111 +*L1088 11111111111011111111111111111111 +*L1120 01110111101101100111011110101011 *L1792 11111111111111111111111111111111 -*L1824 10101011101101111011101101010111 -*L2048 11111001 +*L1824 10111011101101101011101101010111 +*L2048 10100001 *L2056 0101011001100101011100100111010001101001011000110110000101101100 -*L2120 11111111 +*L2120 11011111 *L2128 1111111111111111111111111111111111111111111111111111111111111111 -*L2192 1 +*L2192 0 *L2193 1 -*C6dea +*C454d * -f469 +affa diff --git a/GAL16V8_vertical.pin b/GAL16V8_vertical.pin index 971416f..8c244ce 100644 --- a/GAL16V8_vertical.pin +++ b/GAL16V8_vertical.pin @@ -2,7 +2,7 @@ Pin # | Name | Pin Type ----------------------------- - 1 | A9 | Input + 1 | Clock | Clock 2 | A8 | Input 3 | A7 | Input 4 | A6 | Input @@ -12,12 +12,12 @@ 8 | A2 | Input 9 | A1 | Input 10 | GND | GND - 11 | NC | Input + 11 | NC | /OE 12 | LastLine | Output 13 | A0 | Input - 14 | Hvis | Input + 14 | HVis | Input 15 | Vis | Output - 16 | VsTemp | Output + 16 | A9 | Input 17 | VertVis | Output 18 | Vsync | Output 19 | EndF | Output diff --git a/GAL16V8_vertical.pld b/GAL16V8_vertical.pld index 1801103..ec03efe 100644 --- a/GAL16V8_vertical.pld +++ b/GAL16V8_vertical.pld @@ -1,21 +1,112 @@ GAL16V8 Vertical -A9 A8 A7 A6 A5 A4 A3 A2 A1 GND -NC LastLine A0 Hvis Vis VsTemp VertVis Vsync EndF VCC +Clock A8 A7 A6 A5 A4 A3 A2 A1 GND +NC LastLine A0 HVis Vis A9 VertVis Vsync EndF VCC + + +LastLine = /A9 * /A8 * /A7 * /A6 * A5 * /A4 * /A3 * A2 * A1 * A0 ; D = 39 + ; safety: odd numbers never repeat (when settling time < clock period), + ; and have "width" of exactly 1 clock pulse + +VertVis.R = A3 * A5 * /A8 * /A9 + ; + /A3 * A4 * A5 * /A6 * /A9 + ; + /A4 * /A6 * A7 * /A9 + ; + /A5 * /A6 * A7 * /A9 + ; + A6 * /A8 * /A9 + ; + /A7 * A8 * /A9 ; + ; safety: unsafe, must be registered (why?) + +/Vsync = /A9 * A8 * A7 * A6 * A5 * /A4 * A3 * /A2 * A1 ; 0b01_1110_101x D = {490, 491} + ; safety: can be either unregistered or registered? 491 is odd, + ; 490 must be safe? no repeats before 525 anyway + ; are we playing fast and loose with timing? + ; we'll go 491->490 for one propagation delay, extending vsync ~7ns + ; we'll also rise ~600ns "early", relative to the edge of VertVis? (the width of the clock pulse) + +EndF = A9 * /A8 * /A7 * /A6 * /A5 * /A4 * A3 * A2 * /A1 * A0 ; 0b10_0000_1101 + ; safety: must be unregistered, used as reset (and so can't repeat) + +; Vis = HVis * VertVis +; ^ ghosts at D=440 when VertVis is dropping while HVis is rising +; +; Vis = HVis * VertVis * /(D == 440) +; /Vis = /(HVis * VertVis * /(D == 440)) +/Vis = /HVis + /VertVis + ; Vis is low when either HVis or VertVis is low, + /A9 * A8 * A7 * /A6 * A5 * A4 * A3 * /A2 * /A1 * /A0 ; or, D = 440. + ; safety: must be unregistered, timing sensitive, + ; crossover at D = 440 as VertVis drops + ; 440 appears to be safe? no repeats before 525 anyway -VertVis = A3 * A5 * /A8 * /A9 + /A3 * A4 * A5 * /A6 * /A9 + /A4 * /A6 * A7 * /A9 + /A5 * /A6 * A7 * /A9 + A6 * /A8 * /A9 + /A7 * A8 * /A9 -VsTemp = /A1 + A2 + /A3 + A4 -Vsync = VsTemp + /A5 + /A6 + /A7 + /A8 + A9 -EndF = A0 * /A1 * A2 * A3 * /A4 * /A5 * /A6 * /A7 * /A8 * A9 -Vis = Hvis * VertVis -LastLine = A0 * A1 * A2 * /A3 * /A4 * A5 * /A6 * /A7 * /A8 * /A9 DESCRIPTION Vertical timing -Input: [1-9] -IO: [12-19] -/OE: [11] -Vert \ No newline at end of file +D = {A0..A9} # 10-bit + + (extended blanking) D < 40 +LastLine: D = 39 +VertViz: D >= 40, D < 440 (< 0b01_1110_0000) + (extended blanking) D >= 440, D < 480 + (front porch) D >= 480, D < 490 +Vsync: D >= 490. D < 492 (0b01_1110_101x) + back porch 492 <= D < 525 +EndF: D == 525 (0b10_0000_1101) + +Vis: We're vertically & horizontally visible (we should be outputting pixels). + +0..524 is 525, 1-line increments + +This chip is intended to be driven by a >=10-bit, falling-edge-triggered, +ripple counter. Unlike the horizontal chip, we actually have plenty of time for +the ripple counter to settle, as long as the pulse width is wide enough for +propagation to the 10th bit (which takes ~100ns). Since this chip is intended +to be used in concert with the horizontal logic chip, and we can use /EndL for +both the ripple counter's clock and our own Clock pin, we've got plenty of time +for the number to stabilize before the rising edge of /EndL ~630ns later. + +That said, there are a few timing sensitive pins with that strategy: most +notably EndF, used for reset (so it must not be registered, else we'll skip a +clock as we hold the counter to 0 before our Clock pin rises), and Vis, which +has to be sensitive to the rising and falling edges of HVis that happen off- +cycle from our /EndL clock. + +Some possible changes + +Just for giggles, when the counter has time to fully settle before the next +edge, check out how a 4-bit counter counts 0..16 (mod 2^4-1): + +0b0000 0 +0b0001 1 + 0b0000 0 +0b0010 2 +0b0011 3 + 0b0010 2 + 0b0000 0 +0b0100 4 +0b0101 5 + 0b0100 4 +0b0110 6 +0b0111 7 + 0b0110 6 + 0b0100 4 + 0b0000 0 +0b1000 8 +0b1001 9 + 0b1000 8 +0b1010 10 +0b1011 11 + 0b1010 10 + 0b1000 8 +0b1100 12 +0b1101 13 + 0b1100 12 +0b1110 14 +0b1111 15 + 0b1110 14 + 0b1100 12 + 0b1000 8 +0b0000 0 + +No odd repeats, some numbers only repeat right after themselves diff --git a/GAL22V10_fifo_buf.pld b/GAL22V10_fifo_buf.pld index 2965b2f..96d5d5d 100644 --- a/GAL22V10_fifo_buf.pld +++ b/GAL22V10_fifo_buf.pld @@ -30,5 +30,5 @@ Rdy = /Clock * /Half DESCRIPTION -A 4-to-8 "SIPO" (serial-in, parallel-out) shift register that takes in a Halfuad serial input and demuxes it over a 8-bit parallel output. +A 4-to-8 "SIPO" (serial-in, parallel-out) shift register that takes in a Quad serial input and demuxes it over a 8-bit parallel output. diff --git a/GAL22V10_high_counter.chp b/GAL22V10_high_counter.chp new file mode 100644 index 0000000..ab27cb7 --- /dev/null +++ b/GAL22V10_high_counter.chp @@ -0,0 +1,29 @@ + + + GAL22V10 + + -------\___/------- + Clock | 1 24 | VCC + | | + NC | 2 23 | Q1 + | | + NC | 3 22 | Q3 + | | + NC | 4 21 | Q5 + | | + NC | 5 20 | Q7 + | | + NC | 6 19 | Q9 + | | + NC | 7 18 | Q8 + | | + NC | 8 17 | Q6 + | | + I9 | 9 16 | Q4 + | | + Ext | 10 15 | Q2 + | | + Rst | 11 14 | Q0 + | | + GND | 12 13 | /OE + ------------------- diff --git a/GAL22V10_high_counter.jed b/GAL22V10_high_counter.jed new file mode 100644 index 0000000..793ec3f --- /dev/null +++ b/GAL22V10_high_counter.jed @@ -0,0 +1,79 @@ + +GAL-Assembler: Galette 0.3.0 +Device: GAL22V10 + +*F0 +*G0 +*QF5892 +*L0000 11111111111111111111111111111111111111110111 +*L0044 11111111111111111111111111111111111111111111 +*L0088 11011111111111111111111111111111111111101111 +*L0132 11101111111111111111111111111111111111011111 +*L0440 11111111111111111111111111111111111111111111 +*L0484 11101101111111111111111111111111111011101111 +*L0528 11111110111111111111111111111111110111111111 +*L0572 11011110111111111111111111111111111111111111 +*L0616 11111110111111111111111111111111111111011111 +*L0924 11111111111111111111111111111111111111111111 +*L0968 11101110110111111111111111111110111011101111 +*L1012 11111111111011111111111111111101111111111111 +*L1056 11111101111011111111111111111111111111111111 +*L1100 11111111111011111111111111111111110111111111 +*L1144 11011111111011111111111111111111111111111111 +*L1188 11111111111011111111111111111111111111011111 +*L1496 11111111111111111111111111111111111111111111 +*L1540 11101110111011011111111111101110111011101111 +*L1584 11111111111111101111111111011111111111111111 +*L1628 11111111110111101111111111111111111111111111 +*L1672 11111111111111101111111111111101111111111111 +*L1716 11111101111111101111111111111111111111111111 +*L1760 11111111111111101111111111111111110111111111 +*L1804 11011111111111101111111111111111111111111111 +*L1848 11111111111111101111111111111111111111011111 +*L2156 11111111111111111111111111111111111111111111 +*L2200 11111111111111111111111111111111011101111111 +*L2244 11101110111011101101111011101110111010101111 +*L2288 11111111111111111110110111111111111110111111 +*L2332 11111111111111011110111111111111111110111111 +*L2376 11111111111111111110111111011111111110111111 +*L2420 11111111110111111110111111111111111110111111 +*L2464 11111111111111111110111111111101111110111111 +*L2508 11111101111111111110111111111111111110111111 +*L2552 11111111111111111110111111111111110110111111 +*L2596 11011111111111111110111111111111111110111111 +*L2640 11111111111111111110111111111111111110011111 +*L2904 11111111111111111111111111111111111111111111 +*L2948 11101110111011101111110111101110111011101111 +*L2992 11111111111111011111111011111111111111111111 +*L3036 11111111111111111111111011011111111111111111 +*L3080 11111111110111111111111011111111111111111111 +*L3124 11111111111111111111111011111101111111111111 +*L3168 11111101111111111111111011111111111111111111 +*L3212 11111111111111111111111011111111110111111111 +*L3256 11011111111111111111111011111111111111111111 +*L3300 11111111111111111111111011111111111111011111 +*L3652 11111111111111111111111111111111111111111111 +*L3696 11101110111011111111111111011110111011101111 +*L3740 11111111110111111111111111101111111111111111 +*L3784 11111111111111111111111111101101111111111111 +*L3828 11111101111111111111111111101111111111111111 +*L3872 11111111111111111111111111101111110111111111 +*L3916 11011111111111111111111111101111111111111111 +*L3960 11111111111111111111111111101111111111011111 +*L4312 11111111111111111111111111111111111111111111 +*L4356 11101110111111111111111111111101111011101111 +*L4400 11111101111111111111111111111111111011111111 +*L4444 11111111111111111111111111111111110011111111 +*L4488 11011111111111111111111111111111111011111111 +*L4532 11111111111111111111111111111111111011011111 +*L4884 11111111111111111111111111111111111111111111 +*L4928 11101111111111111111111111111111110111101111 +*L4972 11011111111111111111111111111111111011111111 +*L5016 11111111111111111111111111111111111011011111 +*L5368 11111111111111111111111111111111111111111111 +*L5412 11111111111111111111111111111111111111011111 +*L5808 10101010101010101010 +*L5828 0101001101001001010100000100111100110100011101000110111100111000 +*C52c6 +* +b9ce diff --git a/GAL22V10_high_counter.pin b/GAL22V10_high_counter.pin new file mode 100644 index 0000000..c3928e0 --- /dev/null +++ b/GAL22V10_high_counter.pin @@ -0,0 +1,29 @@ + + + Pin # | Name | Pin Type +----------------------------- + 1 | Clock | Clock/Input + 2 | NC | Input + 3 | NC | Input + 4 | NC | Input + 5 | NC | Input + 6 | NC | Input + 7 | NC | Input + 8 | NC | Input + 9 | I9 | Input + 10 | Ext | Input + 11 | Rst | Input + 12 | GND | GND + 13 | /OE | Input + 14 | Q0 | Output + 15 | Q2 | Output + 16 | Q4 | Output + 17 | Q6 | Output + 18 | Q8 | Output + 19 | Q9 | Output + 20 | Q7 | Output + 21 | Q5 | Output + 22 | Q3 | Output + 23 | Q1 | Output + 24 | VCC | VCC + diff --git a/GAL22V10_high_counter.pld b/GAL22V10_high_counter.pld new file mode 100644 index 0000000..ffc81d4 --- /dev/null +++ b/GAL22V10_high_counter.pld @@ -0,0 +1,136 @@ +GAL22V10 +SIPO4to8 + +Clock NC NC NC NC NC NC NC I9 Ext Rst GND +/OE Q0 Q2 Q4 Q6 Q8 Q9 Q7 Q5 Q3 Q1 VCC + +AR = Rst + +Q0.R = /Q0 + +; 0 1 +; 1 0 +Q1.R = /Q1 * Q0 + Q1 * /Q0 + +; 0 1 1 +; 1 0 x +; 1 x 0 +Q2.R = /Q2*Q1*Q0 + + Q2 * /Q1 + + Q2 * /Q0 + +; 0 1 1 1 +; 1 0 x x +; 1 x 0 x +; 1 x x 0 +Q3.R = /Q3*Q2*Q1*Q0 + + Q3 * /Q2 + + Q3 * /Q1 + + Q3 * /Q0 + +; 0 1 1 1 1 +; 1 0 x x x +; 1 x 0 x x +; 1 x x 0 x +; 1 x x x 0 +Q4.R = /Q4*Q3*Q2*Q1*Q0 + + Q2 * /Q3 + + Q2 * /Q2 + + Q2 * /Q1 + + Q2 * /Q0 + +; 0 1 1 1 1 1 +; 1 0 x x x x +; 1 x 0 x x x +; 1 x x 0 x x +; 1 x x x 0 x +; 1 x x x x 0 +Q5.R = /Q5*Q4*Q3*Q2*Q1*Q0 + + Q5 * /Q4 + + Q5 * /Q3 + + Q5 * /Q2 + + Q5 * /Q1 + + Q5 * /Q0 + +; 0 1 1 1 1 1 1 +; 1 0 x x x x x +; 1 x 0 x x x x +; 1 x x 0 x x x +; 1 x x x 0 x x +; 1 x x x x 0 x +; 1 x x x x x 0 +Q6.R = /Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q6 * /Q5 + + Q6 * /Q4 + + Q6 * /Q3 + + Q6 * /Q2 + + Q6 * /Q1 + + Q6 * /Q0 + +; 0 1 1 1 1 1 1 1 +; 1 0 x x x x x x +; 1 x 0 x x x x x +; 1 x x 0 x x x x +; 1 x x x 0 x x x +; 1 x x x x 0 x x +; 1 x x x x x 0 x +; 1 x x x x x x 0 +Q7.R = /Q7*Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q7 * /Q6 + + Q7 * /Q5 + + Q7 * /Q4 + + Q7 * /Q3 + + Q7 * /Q2 + + Q7 * /Q1 + + Q7 * /Q0 + +; 0 1 1 1 1 1 1 1 1 +; 1 0 x x x x x x x +; 1 x 0 x x x x x x +; 1 x x 0 x x x x x +; 1 x x x 0 x x x x +; 1 x x x x 0 x x x +; 1 x x x x x 0 x x +; 1 x x x x x x 0 x +; 1 x x x x x x x 0 +Q8.R = /Q8*Q7*Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q8 * /Q7 + + Q8 * /Q6 + + Q8 * /Q5 + + Q8 * /Q4 + + Q8 * /Q3 + + Q8 * /Q2 + + Q8 * /Q1 + + Q8 * /Q0 + +; 0 1 1 1 1 1 1 1 1 1 +; 1 0 x x x x x x x x +; 1 x 0 x x x x x x x +; 1 x x 0 x x x x x x +; 1 x x x 0 x x x x x +; 1 x x x x 0 x x x x +; 1 x x x x x 0 x x x +; 1 x x x x x x 0 x x +; 1 x x x x x x x 0 x +; 1 x x x x x x x x 0 +Q9.R = Ext * I9 + + /Ext * /Q9*Q8*Q7*Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + /Ext * Q9 * /Q8 + + /Ext * Q9 * /Q7 + + /Ext * Q9 * /Q6 + + /Ext * Q9 * /Q5 + + /Ext * Q9 * /Q4 + + /Ext * Q9 * /Q3 + + /Ext * Q9 * /Q2 + + /Ext * Q9 * /Q1 + + /Ext * Q9 * /Q0 + +; The last bit can be controlled by the Ext input. If Ext is high, then Q9 +; should always be whatever the value of I9 is at the time of the rising clock. +; If Ext is low then Q9 will count normally, essentially keeping its 10 bit +; counter characteristics. + + +DESCRIPTION + +10 bit counter with selectable last bit diff --git a/GAL22v10_counter8.chp b/GAL22v10_counter8.chp new file mode 100644 index 0000000..c8b7b64 --- /dev/null +++ b/GAL22v10_counter8.chp @@ -0,0 +1,29 @@ + + + GAL22V10 + + -------\___/------- + Clock | 1 24 | VCC + | | + NC | 2 23 | NC + | | + NC | 3 22 | RO + | | + NC | 4 21 | Q7 + | | + NC | 5 20 | Q6 + | | + NC | 6 19 | Q5 + | | + NC | 7 18 | Q4 + | | + NC | 8 17 | Q3 + | | + NC | 9 16 | Q2 + | | + NC | 10 15 | Q1 + | | + Reset | 11 14 | Q0 + | | + GND | 12 13 | /OE + ------------------- diff --git a/GAL22v10_counter8.jed b/GAL22v10_counter8.jed new file mode 100644 index 0000000..f33aa7c --- /dev/null +++ b/GAL22v10_counter8.jed @@ -0,0 +1,59 @@ + +GAL-Assembler: Galette 0.3.0 +Device: GAL22V10 + +*F0 +*G0 +*QF5892 +*L0000 11111111111111111111111111111111111111110111 +*L0440 11111111111111111111111111111111111111111111 +*L0484 11111101111011101110111011101110111011101111 +*L0924 11111111111111111111111111111111111111111111 +*L0968 11111111110111101110111011101110111011101111 +*L1012 11111111111011011111111111111111111111111111 +*L1056 11111111111011111101111111111111111111111111 +*L1100 11111111111011111111110111111111111111111111 +*L1144 11111111111011111111111111011111111111111111 +*L1188 11111111111011111111111111111101111111111111 +*L1232 11111111111011111111111111111111110111111111 +*L1276 11111111111011111111111111111111111111011111 +*L1496 11111111111111111111111111111111111111111111 +*L1540 11111111111111011110111011101110111011101111 +*L1584 11111111111111101101111111111111111111111111 +*L1628 11111111111111101111110111111111111111111111 +*L1672 11111111111111101111111111011111111111111111 +*L1716 11111111111111101111111111111101111111111111 +*L1760 11111111111111101111111111111111110111111111 +*L1804 11111111111111101111111111111111111111011111 +*L2156 11111111111111111111111111111111111111111111 +*L2200 11111111111111111101111011101110111011101111 +*L2244 11111111111111111110110111111111111111111111 +*L2288 11111111111111111110111111011111111111111111 +*L2332 11111111111111111110111111111101111111111111 +*L2376 11111111111111111110111111111111110111111111 +*L2420 11111111111111111110111111111111111111011111 +*L2904 11111111111111111111111111111111111111111111 +*L2948 11111111111111111111110111101110111011101111 +*L2992 11111111111111111111111111011110111111111111 +*L3036 11111111111111111111111111111100111111111111 +*L3080 11111111111111111111111111111110110111111111 +*L3124 11111111111111111111111111111110111111011111 +*L3652 11111111111111111111111111111111111111111111 +*L3696 11111111111111111111111111011110111011101111 +*L3740 11111111111111111111111111101101111111111111 +*L3784 11111111111111111111111111101111110111111111 +*L3828 11111111111111111111111111101111111111011111 +*L4312 11111111111111111111111111111111111111111111 +*L4356 11111111111111111111111111111101111011101111 +*L4400 11111111111111111111111111111110110111111111 +*L4444 11111111111111111111111111111110111111011111 +*L4884 11111111111111111111111111111111111111111111 +*L4928 11111111111111111111111111111111110111101111 +*L4972 11111111111111111111111111111111111011011111 +*L5368 11111111111111111111111111111111111111111111 +*L5412 11111111111111111111111111111111111111011111 +*L5808 00101010101010101010 +*L5828 0100001101101111011101010110111001110100011001010111001000000000 +*Cf424 +* +f4e7 diff --git a/GAL22v10_counter8.pin b/GAL22v10_counter8.pin new file mode 100644 index 0000000..561fd39 --- /dev/null +++ b/GAL22v10_counter8.pin @@ -0,0 +1,29 @@ + + + Pin # | Name | Pin Type +----------------------------- + 1 | Clock | Clock/Input + 2 | NC | Input + 3 | NC | Input + 4 | NC | Input + 5 | NC | Input + 6 | NC | Input + 7 | NC | Input + 8 | NC | Input + 9 | NC | Input + 10 | NC | Input + 11 | Reset | Input + 12 | GND | GND + 13 | /OE | Input + 14 | Q0 | Output + 15 | Q1 | Output + 16 | Q2 | Output + 17 | Q3 | Output + 18 | Q4 | Output + 19 | Q5 | Output + 20 | Q6 | Output + 21 | Q7 | Output + 22 | RO | Output + 23 | NC | NC + 24 | VCC | VCC + diff --git a/GAL22v10_counter8.pld b/GAL22v10_counter8.pld new file mode 100644 index 0000000..8a7fb93 --- /dev/null +++ b/GAL22v10_counter8.pld @@ -0,0 +1,95 @@ +GAL22V10 +Counter + +Clock NC NC NC NC NC NC NC NC NC Reset GND +/OE Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 RO NC VCC + +AR = Reset + +Q0.R = /Q0 + +; 0 1 +; 1 0 +Q1.R = /Q1 * Q0 + Q1 * /Q0 + +; 0 1 1 +; 1 0 x +; 1 x 0 +Q2.R = /Q2*Q1*Q0 + + Q2 * /Q1 + + Q2 * /Q0 + +; 0 1 1 1 +; 1 0 x x +; 1 x 0 x +; 1 x x 0 +Q3.R = /Q3*Q2*Q1*Q0 + + Q3 * /Q2 + + Q3 * /Q1 + + Q3 * /Q0 + +; 0 1 1 1 1 +; 1 0 x x x +; 1 x 0 x x +; 1 x x 0 x +; 1 x x x 0 +Q4.R = /Q4*Q3*Q2*Q1*Q0 + + Q2 * /Q3 + + Q2 * /Q2 + + Q2 * /Q1 + + Q2 * /Q0 + +; 0 1 1 1 1 1 +; 1 0 x x x x +; 1 x 0 x x x +; 1 x x 0 x x +; 1 x x x 0 x +; 1 x x x x 0 +Q5.R = /Q5*Q4*Q3*Q2*Q1*Q0 + + Q5 * /Q4 + + Q5 * /Q3 + + Q5 * /Q2 + + Q5 * /Q1 + + Q5 * /Q0 + +; 0 1 1 1 1 1 1 +; 1 0 x x x x x +; 1 x 0 x x x x +; 1 x x 0 x x x +; 1 x x x 0 x x +; 1 x x x x 0 x +; 1 x x x x x 0 +Q6.R = /Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q6 * /Q5 + + Q6 * /Q4 + + Q6 * /Q3 + + Q6 * /Q2 + + Q6 * /Q1 + + Q6 * /Q0 + +; 0 1 1 1 1 1 1 1 +; 1 0 x x x x x x +; 1 x 0 x x x x x +; 1 x x 0 x x x x +; 1 x x x 0 x x x +; 1 x x x x 0 x x +; 1 x x x x x 0 x +; 1 x x x x x x 0 +Q7.R = /Q7*Q6*Q5*Q4*Q3*Q2*Q1*Q0 + + Q7 * /Q6 + + Q7 * /Q5 + + Q7 * /Q4 + + Q7 * /Q3 + + Q7 * /Q2 + + Q7 * /Q1 + + Q7 * /Q0 + + +RO.R = /RO * Q7*Q6*Q5*Q4*Q3*Q2*Q1*Q0 + +;Q: FE, FF, 00, 01 +;R: 0, 0, 1, 0 + +DESCRIPTION + +8 bit counter \ No newline at end of file diff --git a/Makefile b/Makefile index 2fbd371..1183b37 100644 --- a/Makefile +++ b/Makefile @@ -1,4 +1,5 @@ +SHELL := /bin/sh -ec TOOLS_ROOT := . TOOLS_BIN := $(TOOLS_ROOT)/bin GALETTE := $(TOOLS_BIN)/galette @@ -13,5 +14,5 @@ generate: $(GALETTE) # not phony # depends on Makefile because we put the version in the CLI invocation $(GALETTE): Makefile - cargo install --root $(TOOLS_ROOT) galette --version 0.3.0 + cargo install --root $(TOOLS_ROOT) galette --git https://github.com/rustbox/galette.git --rev 2ba00658608c4e4d1fd51d903a7799dcabe2f9cc touch $(GALETTE) # sometimes cargo no-ops, so keep Make in sync diff --git a/README.md b/README.md index 89a2e92..81d3b3f 100644 --- a/README.md +++ b/README.md @@ -3,3 +3,5 @@ setup: install [minipro](https://gitlab.com/DavidGriffith/minipro) flash me with `make generate && minipro -p ATF22V10C -w GAL22V10_fifo_buf.jed` + +https://www.proto-advantage.com/store/product_info.php?products_id=2200264 \ No newline at end of file