Tosche Station

[sethp]

It's where you go for power converters, amirite?

We get to pick:

• Input type: DC (most commonly) or AC (i.e. at 50 or 60Hz, usually stepped down by a transformer)
• Input level
  • USB delivers power at 5V DC (rated max of 500mA [=2.5W] for USB pre-C; passive USB-C is rated for 3A @ 5V [=15W]
  • USB-C PD¹ is an active protocol (read: requires a dedicated [integrated] circuit to negotiate power on startup) that offers a wide range of voltages: up to 3A @ 20V DC [=60W] over a standard cable, or up to 5.0A @ 48V DC [=240W]
  • Wall warts offer a wide range of possibilities; commonly, 9V AC or 12V DC (with high ripple and low efficiency²)
• Connector type
  • Barrel jack
  • Wire terminals
  • USB-C
  • RJ-45 (for e.g. PoE, in some applications)

And usually forced by the rest of the design:

• Output level: often 3.3V DC, 1.1V DC, etc.
• Output current: heavily dependent on the chip(s) in question

Which leads to the three-way optimization triangle problem:

• Complexity (cost) of circuit: i.e. adding more parts and more types of parts will cost more, but will usually improve noise or efficiency (or trade them off against each other)
• Noise (e.g. "ripple"): if the output voltage is plotted against time, the ideal DC voltage is a flat line in the time dimension. The amount of deviation from a flat line, and its various shapes (see below)
• Efficiency: it's always possible to down-convert observed voltages by sinking current, at the cost of using as much or more power in the converter than is used in the system being powered. Efficiency will always be below 100%, so chaining converters will usually produce worse results than placing them in parallel.

Footnotes

1. https://en.wikipedia.org/wiki/USB_hardware#USB_Power_Delivery ↩

2. The most common circuit design for these is a step-down transformer, single diode (half-rectifier) and a filter capacitor. See: https://www.radioworld.com/tech-and-gear/tech-tips/those-darn-wall-wart-power-supplies ↩

[sethp]

Buck Converters

Buck converters are a type of switching power regulator (toggling the input level off and on again) that commonly include feedback and control circuitry to average some target output. The averaging in a "buck" topology is smoothed by an LC circuit.

Ref: https://www.ti.com/lit/ds/symlink/tps564242.pdf

Depending on the details of this control circuitry, we might get either of these two pictures: both have lots of little "scribbles" as the regulator circuit switches relatively quickly compared to the timescale view, but larger overall "shapes" also emerge. The "left" picture has the shape of a sawtooth, while the right picture looks like scribbled "mountains."

Both are using an inductor as a "flywheel" to average out the switched impulses toggling between ~0 and ~12V, but the "sharktooth" picture represents what happens when the inductor current dips to zero (the flywheel stops spinning).

Some questions:

• What impact does the different "shape" have on downstream components? How do we classify it?
• If a part is designed for a certain maximum supplied ripple, what model did the designers have in mind? Does it matter?

[dougli1sqrd]

Regarding Linear Regulators

The 1.1 V GSW input is the "more important" input in that it, in part, supplies analog signals and should be low noise. The datasheet also says the variation should be +/- 5%, that puts us at +/- 55 mV.

So a solution we've talked about is using a linear regulator being fed from a Buck Switching regulator. The Switching regulator would be used to bring down the unregulated input voltage to the board to a manageable switched (noisy-ish) voltage as input to a linear regulator. The switching regulator is much more efficient than the linear, but more noisy. So to avoid burning lots of current into regulated low (1.1 V) output we bring the linear input voltage to a lowish level, say no more than 2 V, then the linear regulator will be ~50% efficient or better (for a lower input V).

The linear regulator will output a very clean output voltage. Taking a look at https://www.diodes.com/assets/Datasheets/AP7363.pdf ($0.56 on Mouser):

Diodes Incorporated AP7363-HA-7

VREF = 0.6 V, Vout = 1.1 V,

R1 = R2 ( (Vout / Vref) - 1), R2 < 10k

Let R2 = 5k
so, R1 = 4.2k

The datasheet talks about the thermal capabilities of the regulator:

θja is the temperature per watt for the UDFN-8 package
θja = 85 C/W
P = (Vin - Vout) Iout

For GSW, max current for the 1.1 V line is 1290 mA.
Let Vin = 2 V.

P = 1.161 W

Then the datasheet states

Pmax = (150 C - Ta) / θja
where Ta is the ambient temperature

Let Ta = 30 C
so,
Pmax = 1.41 W

So the max power is 1.41 W, which is more than our expected 1.161 W of dissapation ✔️

Since this will be ~50% efficient we'll have to make sure we have the the right amount of input power, but this seems like a good start.

[sethp]

Ahh, so this part looks like it's using a FET in the active region (vs. a switching supply that slams between "saturation" and "cutoff") ,i.e. it's trying to be a series resistor with feedback-driven resistance to drop just the right amount of voltage from its input to regulate the output. That's very interesting! A few things that model suggests to me:

1. It seems like we'll be very sensitive to the actual resistances (vs nominal) of the part(s) in question here, right? So we might want to run the calculation a couple of times: if we're using 1% resistors, for example, with nominal -1% &c to check the bounds¹. I'm not quite sure what numbers to compare to (see below), but I suspect it'll be OK (or we can stack up multiple resistors and gamble that we can find 3 whose net error is less than their absolute maximum, since we only need to win that bet O(once) at this point).
2. The feedback circuit will need some amount of drop and time to compensate when the current increases; I see a "Load Transient Response" graph that shows a current increase with a rise time that's ~20µs (max switching frequency 50kHz) that shows maybe ±20mV transient; that seems good, although I'm Unsure If Fine for us overall. The datasheet lists 0.18%/A "typical" dVout/dIout, which suggests that the output range is acceptable just in case we fall into the "typical" scenario, and I'm not sure how to tell whether that's true.
3. Another name for an active-region transistor is "amplifier": the goal of the negative feedback circuit is to move the base around in the I-V space to compensate, but there will be some maximum operating frequency for that compensation. Going "too fast" might just cause the input ripples to "pass through" the device, or it might end up resonating in a way that amplifies the variance into what I have just learned is technically known as a "motorboat" effect—because if you hooked it up to a speaker, the effect would sound like a motorboat (in the audible frequency ranges), a fact I find very amusing. I'm concerned this one is Not Fine for mashing up the AP7363-HA-7 with the '47s, since those operate at roughly 2.2MHz, and all the noise curves and PSRR numbers I can find in the AP7363's datasheet top out at ~100kHz.

Re: 1, I see three different parameters in our sample consumer datasheet (the GSW) for e.g. VDDL²:

• Section 2.2.3.7 "Power Supply" (p. 32) defines the nominal voltage as VDDL = 1.1V±5%
• Section 5.2 "Operating Ranges" (p. 337) defines the operating range as [1.05V, 1.15V]
• Section 5.5.2 "Power Supply" (p. 341) defines the maximum ripple R_VDDL as 30.0mV Peak-to-Peak

Some of these conflict, but others I think are describing averages vs. transient values; like, the operating range seems like it'd be an average, meaning if we on average deliver >1.05V we're ok, even if we temporarily drop below that? Or maybe they rounded off the 1.045V (from 1.1V-5%) to 1.05, and they really mean "all-time minimum"? Either way, 30mV peak-to-peak is a tighter bound—presumably it's an AND? A sine wave centered at 1.065V±15mV would seem to satisfy both constraints, but what about a 1.055±10mV wave?

It matters because that defines the lower (& upper) tolerance we have; when Vref drops to 0.575V and we have our worst case (R2=5k+1% and R1=4.2k-1%) we'd expect a V_out centered on 1.048V; if we have a biased ripple at -0mV +30mV then we'd average more than 1.05V even though we'd dip below that 1.05V number from 5.2 (but not the 1.045V number from 2.2.3.7).

Footnotes

1. and at some point probably again with temperature taken into effect; 30°C ambient seems like an OK assumption for now, but my house varies at least between ~10°C and ~40°C and it'd sure be a shame if we lost regulation when it got too hot (or too cold). ↩

2. well, four, but let's set aside surge protection for now and look at just the operating voltages and not the "absolute maximums." ↩

[sethp]

Oh! I have found a graph of PSRR (power supply [ripple] rejection ratio) for the AP7363-HA-7! It's on page 6 of the datasheet you linked; low-res screenshot incoming:

Getting less than 10dB of PSRR after 1MHz sure seems like it's not the part for us, at least in the configuration you described (~MHz Buck -> LDO), unfortunately confirming the "Not Fine" from my item 3 (I guess that's saying its name is "PSRR-vs-frequency"?).

I went looking for more information on PSRR, and I found https://www.ti.com/lit/an/slyt202/slyt202.pdf : the back pages all scan to me like "how to make a better LDO" and less "how to evaluate fit-for-purpose of an existing LDO" but the first page was really good, so I may go back and read the rest more thoroughly later.

For now, per Teel, we can think of PSRR roughly as:

$${\rm PSRR} = 20 \log \frac{\rm Ripple_{Input}}{\rm Ripple_{Output}}$$

Or, in other words, 1/20th as many (base-10) zeros get "pushed in front" of the ripple; e.g.

• a PSRR of 60dB produces a ratio of $10^{-3} = 0.001$, so a 1V input ripple shows up as ~ 1mV output ripple
• a PSRR of 80dB produces a ratio of $10^{-4} = 0.0001$, so a 1V input ripple ~ 100µV output ripple

Two other noteworthy things from the first page of Teel there:

In the case of an LDO, [PSRR] is a measure of the output ripple compared to the input ripple over a wide frequency range (10 Hz to 10 MHz is common) and is expressed in decibels (dB).

Which I read to say that, provided as a single number, PSRR is kind of useless for estimating the noise attenuation we'd get from plugging one in after our switching supply. That said, the AP7363 doesn't give us a single number, they give it to us at 120Hz and 1kHz, both of which "push" more than 3 zeros in front of the ripples (>60dB PSRR). That says to me they designed that part to be hooked up after a bridge rectifier (120Hz) or a much slower switching supply (1kHz).

Another parameter that is closely related to PSRR is line transient response. PSRR is specified at specific frequencies,
whereas a line transient essentially contains all frequencies due to the Fourier components of a step function. However,
the primary difference is that PSRR is based on small signals, whereas line transients are large signals and thus theoretically much more complicated in nature.

Which I take to mean that PSRR is a sort of "lower bound" on line transient response: it's what you'd see if you had a frequency-vs-amplitude graph with a single sharp spike in it, but real-world Fourier signals are "lumpy", and, roughly the "badness" grows proportionally with the area under the intersection of the curves? (Like, making the PSRR really good at one frequency helps you proportional to the amount of your transients which show up at that frequency; the graphs are a little backwards because higher rejection dB is better, but I'm going for a metaphor here)

So making PSRR better improves line transients as he said, which suggests for us that there's a "good enough everywhere PSRR" curve (never below 80dB, maybe?) that can remove the question of line transient response from consideration. I doubt we'll find a LDO regulator that offers that kind of performance, though, and I don't know if a Zener shunt regulator even works like that (I have no idea what the frequency response of a Zener is, maybe it'd work?).

So, if we do still have to evaluate the line transients (which is probably a good name for my item 2), I still think we have a little more work to do in order to figure out how to characterize those. The GSW part only seems to list, like, maximum average currents, and doesn't really provide any detail about the step response that I can find.

[dougli1sqrd]

well I'm convinced. I think also if we can find a switching gizmo and associated circuitry that does what we want within the bounds I think we should just go for that, and it seems like we could do it. It'd be much easier to make too.

[dougli1sqrd]

On TI TPS563207DRLR Switching Supply

Datasheet here: https://www.ti.com/lit/ds/symlink/tps563207.pdf?ts=1721343804662

Our target output voltage is between 1.045 V - 1.155 V (5% surrounding 1.1 V)

I finally was able to log in / create an account at TI's website, so I could mess with the power workbench. I told it I_out max was 3 A, and nominal was 400 mA and that I wanted output voltage ripple of 2% or better and it generated this:

Here are the results of a few of the simulations:

1. 300 mA to 3 A load switching back and forth

Of note here is that the scale on the VOUT graph is well within the the target range.

Steady State at 3 A load (I'd like to do a sim with like 300 - 400 mA load, but won't be included here)

Again the wave form is well within the range.

Input Voltage (like from power supply) moving around

Final Thoughts

All of this makes me wonder if we could use something like this or similar to directly feed the 1.1 V Power? Before with the '47 we were worried that it would still be too noisy. But here according to the sim, we're well within our VOUT in a variety of situations. It would also be much simpler and less power wasteful to direct a switching supply to a linear regulator.

It also occurs to me that we could probably setup a LR Low Pass Filter (which I guess is kinda what the inductor is for anyway) to try and block the switching noise kind of as much as we wanted to engineer for?

(ignore the actual values, this is just the topology)

But something like this could block high frequency signals getting out of VOUT.

Heat

All of these parts seem like if we did nothing they'd melt themselves pretty well after sustained use at like 2 or 3 W. That is on the upper bounds of what the 1.1 V supply will require, but something we should think about at least. I think it's plausible we could thermally paste on a heat sink too if we wanted.

[sethp]

Oh, very cool! I very much appreciate the work you (and TI) have done here: both selecting and simulating a circuit so we can talk about it is such a huge part of the puzzle!

All of this makes me wonder if we could use something like this or similar to directly feed the 1.1 V Power? Before with the '47 we were worried that it would still be too noisy. But here according to the sim, we're well within our VOUT in a variety of situations. It would also be much simpler and less power wasteful to direct a switching supply to a linear regulator.

I think you're spot on that there exists a power supply topology that would work for the GSW chip. Fewer pieces do seem better, since adding more complexity is probably going to give us better specific performance at the cost of more complex transients to analyze. When we talked about this last, I think we'd hoped we could trade efficiency and cost away for a cleaner power output with less analysis to do, and I think we discovered that's not really a trade we get to make.

Asking the TI power designer for a solution doesn't seem wrong, as long as we can set the parameters "close enough." I'd hoped that the designer would itself guide us toward what a model for how to evaluate different supplies relative to our goals, but so far it seems more like a tool that probably solves a problem if I already knew what I was doing.

Our target output voltage is between 1.045 V - 1.155 V (5% surrounding 1.1 V)

I'm not so sure about that: I think that 5% applies only to the average value (or possibly the average and minimum/maximums), but the ripple (and, possibly, transients?) is listed elsewhere in the datasheet as "not more than 30mV peak-peak" (citation in my reply to the LDO idea above). That's a maximum variation of 2.72%, which luckily 2% is below, and I see a peak-to-peak variation of about ~4mV between 1.110V & 1.106V in the "normal" case, and the ringing produced by the load switching transients looks like it's not worse than about 16mV peak-peak (1.116V to 1.1000V).

I'm a little concerned about the Vin being so "flat" in the simulation, though: if we assume a perfect noise-free input DC voltage, there are an awful lot more power supplies that will work than if use a more realistic model, right? (Also, if we can have a perfect noise-free input DC voltage from some magic source, can we just.... make the magic source give us 1.1V?)

I told it I_out max was 3 A, and nominal was 400 mA and that I wanted output voltage ripple of 2% or better

Did you run the sim of the same layout with a steady state of 300-400mA load? 3A seems like a lot, since the datasheet says the GSW part maxes out its 1.1V draw at ~1.3A. I'm all for margin of safety, but I'm not sure I'm prepared to assume that both the ripple and transient effects are smaller the further away from the maximum we get. (It would be nice if they were, but so far the electrons remain stubbornly avoidant of my wishes for them to obey a simpler set of rules.)

[sethp]

Oh, and if you want an overly-abridged summary of my partial education on the topic of filters:

It also occurs to me that we could probably setup a LR Low Pass Filter (which I guess is kinda what the inductor is for anyway) to try and block the switching noise kind of as much as we wanted to engineer for?

Broadly speaking, an LR filter doesn't do anything an LC filter would do except waste current: and as you note there's already an LC low-pass filter on the output of the circuit there. As I understand it, that's the definition of a buck topology: some switching source behind an LC filter.

As for filter design, we can engineer the critical frequency to be approximately whatever, and then we get an (idealized) graph like:

But I think we're back again at the "we ought to build better mental models" problem; a more realistic plot probably looks a lot more like the v-shaped curve we saw looking at decoupling capacitors, as at some point the parasitic effects begin to dominate. Worse, non-linear interactions (like resonance/ringing and reflections) show up when we use a more realistic model of the noise than just a pure sine wave at a given frequency, but unfortunately I don't have that model grasped firmly enough to explain it.

[dougli1sqrd]

The graph is a little wonky, but the "grey" plot is steady state VOUT with load current 300 mA. From what it looks like the peak to peak output voltage only gets better (smaller) as the current goes down

[dougli1sqrd]

Re LC filter, I'm not seeing much online about LC filters. Falstad and other online sources say low pass filters can be done with with RC also but then in our case we'd have a resistor in the way which would limit our current. So an LR filter wouldn't limit the current since L is just a wire still. You could pick a resistance that doesn't take away much current, like a 10 or 20 kohm and then pick the corresponding L value. Maybe in the switch supply it'd be sufficient to just add even bigger L for the output inductor?

[sethp]

Categorizing (Buck) Converters

This is an interesting: https://www.ti.com/lit/sg/slyt729b/slyt729b.pdf

It's a table (of sorts) of different TI converter parts showing their input voltage ranges against their output current ratings; so that matches our experience that one way to filter these parts is by looking for ones that have the "right" input range and are rated to deliver a certain amperage without catching on fire.

But that lens only helps so much, there's certain operating points (like, say, Vin of 6-9V and 1-3A) that cover a lot of parts. Perhaps more interesting is to look at what they mean by the various colors (and gradients?), which have a key of:

• Low EMI
  • EMI is "electromagnetic interference"; what does it mean to be "low"?
• Low IQ (≤ 5μA)
  • $I_Q$ is "quiescent current"; the minimum current draw through the device that will end up (among other things) set a floor on the power efficiency.
  • looks relevant: https://www.ti.com/lit/wp/slyy203b/slyy203b.pdf
• Low Solution Cost
  • It's really hard to tell besides relative sticker price what they're trading away here; there are lots of things shaded "green" (including, probably, bi- and tri-colors, see below).
• Power Density
  • My read on this one is that it's less a measure of actual power density than it is a relative size; within the same amperage grouping, they tagged the smaller packages as "dense"
  • Otherwise, I'm not sure how to interpret the document's claim that a 4A-max part which is larger than a 10A-max part both count as "power dense"
  • Still, "PCB space" is a useful tradeoff/guideline to keep in mind
• General Purpose
  • This is the "well, we didn't have anything nice to say, but we needed a color for the background" category, it seems.
• AVS/DVS capabilities ("Adaptive Voltage Scaling" and "Dynamic Voltage Scaling")
  • via https://www.ti.com/lit/an/slva646/slva646.pdf:

    Adaptive voltage scaling (AVS) is the adaptation or modification of the supply voltage for a processor voltage-domain given the process strength. A processor from the strong category of the silicon process has high dynamic performance (a strong device can operate at a given frequency at a lower than nominal voltage), but it also has a higher leakage current which causes higher power dissipation when operated at a nominal voltage. Because of process variations, the supply voltage of each device can be adjusted to minimize power while still achieving desired performance. The resulting minimum supply voltage required for an individual device or IC, given the particular process strength of the IC, is programmed onto each IC. The PMIC can then read minimum supply voltage of each device and adjust the supply voltage level for optimal performance.

  • Looks very relevant for reducing wasted power, and may be essential for effective CPU/FPGA power management; up to 60% savings is possible.
• Automotive qualified
  • e.g. https://en.wikipedia.org/wiki/ISO_26262
  • That standard appears to be a risk-management model based on evaluating various hazards against their likelihoods and possible outcomes. Being "automotive qualified" means that someone put in some amount of effort to evaluate the part in that way, and presumably that artifact is available to us as well.
  • In other words, this is maybe useful for "phase 3" (make it work well), with some additional effort to map the situations they evaluated to our own.
• Wettable flanks: This looks like a way to improve the solder joint mechanically (and possibly to make it easier to inspect); seems to mostly come up in automotive contexts.

[sethp]

On solution costs, power densities, and gradients

What does TI mean by "low solution cost" and/or "power dense"?

Despite having identical volt/amp operating ranges, the TLV62569 is shaded green for "low solution cost"; the TPS62825 is I suppose shaded with a blue/red gradient that indicates "low IQ" and "power density."

One thing that jumps out to me is that the TLV62569 packages are a lot bigger—SOT23 (2.9x2.8) & SOT563 (1.6x1.6)—vs the TPS62825's QFN (1.5x1.5)/(1.5x2). So maybe "power dense" just means "smaller package sizes?"

The cost thing checks out too, relatively speaking anyway—at volume, the TLV part costs only about 5.6¢ (if you want to buy thousands) whereas the TPS part costs a whopping 35¢. Hopefully the "solution" part of "low solution cost" implies that the TLV part doesn't require a whole bunch of external circuitry that the TPS part includes.

Still, this appears to be at best a binary tagging scheme based on absent criteria (this part just feels "dense", y'know?) made more colorful. And, when they wanted to tag the same part with more than one of these, they used a gradient. That's.... certainly a solution to the problem of "oh but I want the TPS62825 to be flagged as both 'Low IQ' and 'Power Dense'".

Now, though, we get to play a fun guessing game:

How many colors is that? What about this one?

Ok but surely this is three colors?

Maybe it helps to have the key:

But it would've helped a whole lot more to have imagined some ways people might want to "query" this document rather than just how to pack in as many bits of information. There's only like 4-8 parts in any particular group: if you're committed to the amps/volts bar chart thing, maybe just put some (accessible) symbols to indicate the presence (or, if you like, absence) of one of those properties?

[sethp]

Ok, so, gradients aside (I mean, even just solid stripes of color would've been better!), I think roughly for a prototype we'd care in approximately this order:

1. Low EMI
2. "Power Density" (to minimize prototype PCB area)
3. Low Cost
4. Low $I_Q$

Which, combined with availability in small quantities (e.g. mouser has them in stock and will sell us ~10 or so), may help filter out some of the options. A production run would hopefully involve quantifying "EMI" in a way that we could to good enough, so that the priorities might become:

1. Low Cost
2. Low $I_Q$ (assuming that quiescent current is a meaningful power draw; it ought to be, but that might be a "phase 3" thing)
3. Sufficient EMI & power density to serve the above two goals

Does that seem right to you, @dougli1sqrd ?

If so, we might want to look at the TPS54308; it's "near" the TPS563207, but is also shaded probably yellow ("Low EMI"). It also looks like there's three yellow/green/red parts in the 2A, "wide Vin" range that might be worth our consideration too.

[dougli1sqrd]

Haha for gradients, the first 2 are definitely 2 colors, and the 3rd one is 3 colors, but that's an incredibly bad way to show that information

[dougli1sqrd]

For prototype I guess I'd swap 2 and 3:

1. Low EMI
2. Low Cost
3. PCB area
4. Iq

[sethp]

oh excellent, a place our mental models don't line up Would you say more about 2 vs 3 there? I'm curious if this is a case where we're seeking different goals (i.e. "taste"), or if we're seeking the same goal differently (i.e. "discernment").