RuVector/examples/ultra-low-latency-sim/Cargo.toml at main · ruvnet/RuVector · GitHub

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
[workspace]

[package]
name = "ultra-low-latency-sim"
version = "0.1.0"
edition = "2021"
description = "Meta-simulation achieving quadrillion simulations/second on CPU with SIMD"
license = "MIT"

[dependencies]
rayon = "1.10"
rand = "0.8"
rand_xoshiro = "0.6"
ed25519-dalek = { version = "2.1", features = ["rand_core"] }
sha2 = "0.10"
hex = "0.4"

[target.'cfg(target_arch = "aarch64")'.dependencies]
# ARM NEON is always available on aarch64

[target.'cfg(target_arch = "x86_64")'.dependencies]
# AVX2/AVX-512 detected at runtime

[profile.release]
opt-level = 3
lto = "fat"
codegen-units = 1
panic = "abort"

[profile.bench]
inherits = "release"
debug = true

[[bin]]
name = "quadrillion-sim"
path = "src/main.rs"

# Benchmarks can be added later
# [[bench]]
# name = "meta_simulation"
# harness = false