Skip to content

Latest commit

ย 

History

History
112 lines (78 loc) ยท 3.15 KB

File metadata and controls

112 lines (78 loc) ยท 3.15 KB

riscv_ripes-simulator ๐Ÿ–ฅ๏ธ๐Ÿ”ง

This repository contains RISC-V assembly code simulations developed and tested using the Ripes Simulator, a visual computer architecture simulator for educational purposes.


๐Ÿš€ About RISC-V

RISC-V is an open standard Reduced Instruction Set Computing (RISC) instruction set architecture (ISA) that is free and extensible. It is designed to be simple, modular, and efficient, making it ideal for teaching computer architecture as well as for commercial implementations.


๐Ÿ› ๏ธ What is Ripes Simulator?

Ripes is a user-friendly graphical simulator that allows users to:

  • Visualize RISC-V pipelines
  • Simulate assembly programs step-by-step
  • Inspect registers, memory, and control signals
  • Experiment with computer architecture concepts interactively

You can try the online version of Ripes here:
https://ripes.me/


๐Ÿ“ Repository Structure

The repository is organized into 24 folders, each named to indicate the covered topic for easy navigation:

riscv-ripes-simulator
โ”œโ”€โ”€ 01_addition
โ”œโ”€โ”€ 02_subtraction
โ”œโ”€โ”€ 03_add_sub
โ”œโ”€โ”€ 04_hll_to_alp
โ”œโ”€โ”€ 05_imm_operand
โ”œโ”€โ”€ 06_initialising
โ”œโ”€โ”€ 07_32bit_load
โ”œโ”€โ”€ 08_32bit_neg_load
โ”œโ”€โ”€ 09_reading_mem
โ”œโ”€โ”€ 10_storing_mem
โ”œโ”€โ”€ 11_if_statement
โ”œโ”€โ”€ 12_if_else
โ”œโ”€โ”€ 13_case
โ”œโ”€โ”€ 14_while
โ”œโ”€โ”€ 15_do_while
โ”œโ”€โ”€ 16_for
โ”œโ”€โ”€ 17_array
โ”œโ”€โ”€ 18_lb_sb_ascii
โ”œโ”€โ”€ 19_func_call_return
โ”œโ”€โ”€ 20_reg_on_stack
โ”œโ”€โ”€ 21_scratch_reg_stack
โ”œโ”€โ”€ 22_opt_func_call
โ”œโ”€โ”€ 23_non_leaf_func
โ”œโ”€โ”€ 24_factorial
โ”œโ”€โ”€ LICENSE
โ”œโ”€โ”€ README.md

๐Ÿ“š Topics Covered Examples

  • Register_initialization ๐Ÿ› ๏ธ
    Instructions like addi, lui, setting registers with immediate values.

  • Memory_load_store ๐Ÿ’พ
    Loading and storing data with lw, sw, lb, sb.

  • Control_flow_branching ๐Ÿ”€
    Branch instructions beq, bne, jump instructions, if-else clauses.

  • Loops_iterations ๐Ÿ”„
    Common loops in assembly: for, while, do-while.

  • Function_calls_stack ๐Ÿ“ž๐Ÿ—„๏ธ
    Stack frame creation, saving/restoring registers, calling conventions.

  • Arithmetic_logic โž•โž–โœ–๏ธ
    Arithmetic and logical operations: add, sub, mul, shifts.

  • Character_array_manipulation ๐Ÿ”ค๐Ÿงฎ
    Byte-level manipulations, ASCII case conversions.

  • Recursive_algorithms โ™ป๏ธ
    Recursive functions like factorial with stack usage.

... and more.


๐Ÿ“– How to Use This Repo

  • Navigate to folders corresponding to the topic of interest.
  • Inside each folder, find RISC-V assembly code along with markdown explanations.
  • Use the online or desktop Ripes simulator to load and run these codes.
  • Modify and experiment with the code snippets to deepen your understanding.

๐Ÿ”— Useful Links

Happy learning and simulating RISC-V! ๐Ÿš€