Reorganize PIC and PIT driver

Author: scopeInfinity

.gdbinit

@@ -1,6 +1,6 @@
-set $CS_BASE = 0x20000
-set $DS_BASE = 0x20000
-set $SS_BASE = 0x20000
+set $CS_BASE = 0x30000
+set $DS_BASE = 0x30000
+set $SS_BASE = 0x30000
 
 # config
 set architecture i386:x86-64
@@ -72,17 +72,17 @@ define view_realmode
 end
 
 define view_kernelmode
-    set $CS_BASE = 0xC000
-    set $DS_BASE = 0xC000
-    set $SS_BASE = 0xC000
+    set $CS_BASE = 0x10000
+    set $DS_BASE = 0x10000
+    set $SS_BASE = 0x10000
     symbol-file build/kernel/core.elf
     clayout
 end
 
 define view_usermode
-    set $CS_BASE = 0x20000
-    set $DS_BASE = 0x20000
-    set $SS_BASE = 0x20000
+    set $CS_BASE = 0x30000
+    set $DS_BASE = 0x30000
+    set $SS_BASE = 0x30000
     symbol-file
     clayout
 end

include/fuzzy/drivers/pic/pic.h

@@ -1,15 +1,16 @@
 #pragma once
 
+#include <stddef.h>
+
 #define PIC_PIT_FREQ        1193182  // hz
 #define PIC_PIT_MAX_COUNTER 0xFFFF
 
 #define PIC_IRQ_PIT 0
 
-void interrupt_pit_enable();
+void pic_init();
+
+void pic_writemask_new(uint16_t mask);
+uint16_t pic_readmask_new();
 
 void pic_irq_enable(int irq);
 void pic_irq_disable(int irq);
-
-void pic_pit_set_counter(unsigned short counter);
-unsigned short pic_pit_get_counter();
-void pic_pit_reset();

include/fuzzy/drivers/pic/pit.h

@@ -0,0 +1,13 @@
+#pragma once
+
+#include <stddef.h>
+
+static uint16_t frequency_dividor;
+
+void pit_init();
+
+void pit_set_counter(uint16_t counter);
+uint16_t pit_get_counter();
+
+void pit_reload_counter();
+void pit_reset();

include/fuzzy/drivers/port.h

@@ -0,0 +1,33 @@
+#pragma once
+
+#include <stddef.h>
+
+#define PORT_PIC1_CMD     0x20
+#define PORT_PIC1_DATA    0x21
+#define PORT_PIC2_CMD     0xA0
+#define PORT_PIC2_DATA    0xA1
+
+#define PORT_PIT_DATA0    0x40
+#define PORT_PIT_DATA1    0x41
+#define PORT_PIT_DATA2    0x42
+#define PORT_PIT_CMD      0x43
+
+static inline void outb(uint16_t port, uint8_t data) {
+    __asm__ volatile(
+        "outb %0, %1 \n"
+        :  /* output */
+        : "a" (data), "ir" (port)  /* input */
+        :
+    );
+}
+
+static inline uint8_t inputb(uint16_t port) {
+    uint8_t data;
+    __asm__ volatile(
+        "inb %1, %0 \n"
+        : "=a" (data) /* output */
+        : "ir" (port)  /* input */
+        :
+    );
+    return data;
+}

src/drivers/pic/Makefile.mk

@@ -2,9 +2,5 @@ $(SELF_BUILD_DIR)/%.o: $(SELF_SRC_DIR)/%.c $(BUILD_USR_INCLUDE_ALL)
 	mkdir -p $(dir $@)
 	$(KERNEL_CC) -c -o $@ $<
 
-$(SELF_BUILD_DIR)/%_asm.o: $(SELF_SRC_DIR)/%.asm
-	mkdir -p $(dir $@)
-	nasm -o $@ -f elf32 $<
-
 $(SELF_BUILD_DIR)/libpic: $(SELF_BUILD_ALL_C) $(SELF_BUILD_ALL_ASM)
 	ar rc $@ $^

src/drivers/pic/pic.asm

@@ -1,35 +1,52 @@
+#include <fuzzy/drivers/port.h>
 #include <fuzzy/drivers/pic/pic.h>
 #include <fuzzy/kernel/interrupts/interrupts.h>
 #include <lib/utils/logging.h>
 
-extern void _pic_init_low(int idt_irq0_pic1, int idt_irq0_pic2);
-extern void _pic_pit_init();
+void pic_init() {
+    print_log("[driver][pic] init");
+    int idt_irq0_pic1 = IDT_IRQ_OFFSET;
+    int idt_irq0_pic2 = IDT_IRQ_OFFSET+8;
 
-extern void pic_timer_set_counter(unsigned short counter);
-extern unsigned short pic_timer_get_counter();
-extern void pic_pit_reset();
+    outb(PORT_PIC1_CMD, 0x11);
+    outb(PORT_PIC2_CMD, 0x11);
 
-extern unsigned short _pic_readmask();
-extern void _pic_writemask(unsigned short mask);
+    // Remap IRQ
+    // FuzzyOS won't be using IRQ0 in real mode.
+    outb(PORT_PIC1_DATA, idt_irq0_pic1);
+    outb(PORT_PIC2_DATA, idt_irq0_pic2);
 
-void pic_init() {
-    print_log("PIC init.");
-    _pic_init_low(IDT_IRQ_OFFSET, IDT_IRQ_OFFSET+8);
+    outb(PORT_PIC1_DATA, 4);
+    outb(PORT_PIC2_DATA, 2);
+
+    outb(PORT_PIC1_DATA, 1);
+    outb(PORT_PIC2_DATA, 1);
 
     // disable all IRQs
-    _pic_writemask(0xFFFF);
+    pic_writemask_new(0xFFFF);
+
+    pit_init();
+}
+
+void pic_writemask_new(uint16_t mask) {
+    outb(PORT_PIC1_DATA, mask&0xFF);
+    outb(PORT_PIC2_DATA, mask>>8);
+}
 
-    _pic_pit_init();
+uint16_t pic_readmask_new() {
+    uint16_t mask = inputb(PORT_PIC1_DATA);
+    mask |= inputb(PORT_PIC2_DATA) << 8;
+    return mask;
 }
 
 void pic_irq_enable(int irq) {
-    int mask = _pic_readmask();
+    int mask = pic_readmask_new();
     mask = mask&(~(1<<irq));
-    _pic_writemask(mask);
+    pic_writemask_new(mask);
 }
 
 void pic_irq_disable(int irq) {
-    int mask = _pic_readmask();
+    int mask = pic_readmask_new();
     mask = mask|((1<<irq));
-    _pic_writemask(mask);
-}
+    pic_writemask_new(mask);
+}

src/drivers/pic/pic.c

@@ -0,0 +1,33 @@
+#include <fuzzy/drivers/port.h>
+#include <fuzzy/drivers/pic/pit.h>
+
+static uint16_t frequency_dividor;
+
+void pit_init() {
+    // Channel 0
+    // Low/high byte
+    // Interrupt on terminal count
+    outb(PORT_PIT_CMD, 0b00110000);
+}
+
+uint16_t pit_get_counter() {
+    return frequency_dividor;
+}
+
+void pit_reload_counter() {
+    uint16_t counter = pit_get_counter();
+    outb(PORT_PIT_DATA0, counter&0xFF);
+    outb(PORT_PIT_DATA0, counter>>8);
+}
+
+
+void pit_reset() {
+    outb(PORT_PIC1_CMD, 0x20);
+    outb(PORT_PIC2_CMD, 0x20);
+    pit_reload_counter();
+}
+
+void pit_set_counter(uint16_t counter) {
+    frequency_dividor = counter;
+    pit_reload_counter();
+}

src/drivers/pic/pit.c

@@ -4,7 +4,7 @@
 
 global irq0_pit_handler_low
 extern irq0_pit_handler
-extern pic_pit_reset
+extern pit_reset
 
 global create_infant_process_irq0_stack
 
@@ -79,7 +79,7 @@ global create_infant_process_irq0_stack
     irq0_pit_handler_low:
         _int_irq0_start
         call irq0_pit_handler
-        call pic_pit_reset
+        call pit_reset
         _int_irq0_end
         iret
 

src/kernel/interrupts/timer.asm

@@ -34,7 +34,7 @@ int get_time_since_boot_ms() {
 void irq0_pit_handler(int *e_ip, int *e_cs, int *e_sp, int *e_ss) {
     // called every X milli seconds.
     // time period is defined by pic_pit_set_counter.
-    unsigned short ticks_jumped =  pic_pit_get_counter();
+    unsigned short ticks_jumped =  pit_get_counter();
 
     int oldtime_ms = get_time_since_boot_ms();
     timer_add_ticks(ticks_jumped);
@@ -44,7 +44,7 @@ void irq0_pit_handler(int *e_ip, int *e_cs, int *e_sp, int *e_ss) {
 }
 
 void interrupt_pit_enable() {
-    pic_pit_set_counter(PIC_PIT_FREQ/100);  // 10ms
+    pit_set_counter(PIC_PIT_FREQ/100);  // 10ms
     pic_irq_enable(PIC_IRQ_PIT);
 }