@@ -141,11 +141,6 @@ static int pfe_platform_probe(struct platform_device *pdev)
141141
142142 pfe -> dev = & pdev -> dev ;
143143
144- /* FIXME this needs to be done at the BSP level with proper locking */
145- pfe_writel (pfe_readl (PFE_AXI_RESET ) | PFE_SYS_AXI_RESET_BIT , PFE_AXI_RESET );
146- mdelay (1 );
147- pfe_writel (pfe_readl (PFE_AXI_RESET ) & ~PFE_SYS_AXI_RESET_BIT , PFE_AXI_RESET );
148-
149144 /* Get the system clock */
150145 clk_axi = clk_get (NULL ,"axi" );
151146 if (IS_ERR (clk_axi )) {
@@ -154,6 +149,21 @@ static int pfe_platform_probe(struct platform_device *pdev)
154149 goto err_clk ;
155150 }
156151
152+ /* HFE core clock */
153+ pfe -> hfe_clock = clk_get (NULL , "hfe_core" );
154+ if (IS_ERR (pfe -> hfe_clock )) {
155+ printk (KERN_INFO "clk_get call failed\n" );
156+ rc = - ENXIO ;
157+ goto err_hfe_clock ;
158+ }
159+
160+ clk_disable (pfe -> hfe_clock );
161+ /* FIXME this needs to be done at the BSP level with proper locking */
162+ pfe_writel (pfe_readl (PFE_AXI_RESET ) | PFE_SYS_AXI_RESET_BIT , PFE_AXI_RESET );
163+ mdelay (1 );
164+ pfe_writel (pfe_readl (PFE_AXI_RESET ) & ~PFE_SYS_AXI_RESET_BIT , PFE_AXI_RESET );
165+ clk_enable (pfe -> hfe_clock );
166+
157167 pfe -> ctrl .clk_axi = clk_axi ;
158168 pfe -> ctrl .sys_clk = clk_get_rate (clk_axi ) / 1000 ; // save sys_clk value as KHz
159169
@@ -164,6 +174,8 @@ static int pfe_platform_probe(struct platform_device *pdev)
164174 return 0 ;
165175
166176err_probe :
177+ clk_put (pfe -> hfe_clock );
178+ err_hfe_clock :
167179 clk_put (clk_axi );
168180err_clk :
169181#ifndef CONFIG_OF
@@ -207,6 +219,8 @@ static int pfe_platform_remove(struct platform_device *pdev)
207219
208220 /* FIXME this needs to be done at the BSP level with proper locking */
209221 pfe_writel (pfe_readl (PFE_AXI_RESET ) | PFE_SYS_AXI_RESET_BIT , PFE_AXI_RESET );
222+ clk_disable (pfe -> hfe_clock );
223+ clk_put (pfe -> hfe_clock );
210224
211225 clk_put (pfe -> ctrl .clk_axi );
212226 iounmap (pfe -> ipsec_baseaddr );
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