optimization of ccc

[lispc]

Describe the feature you would like

1. can we speedup RwMap::table_assignments_with_idx?
2. for bus-mapping codecopy, avoid convert &[u8] to Bytecode. Bytecode is_code is not needed in copy circuit, so i think we can optimize this.
3. optimize rlp circuit min_num_rows_block. most other circuits has an almost O(1) time of min_num_rows_block, while rlp circuit is full featured witgen, even with challenges.
4. inside keccak_input, avoid recover_pk2

Additional context

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[FabioT81]

100% agree