This repository was archived by the owner on Apr 18, 2025. It is now read-only.
Enhancing SNARK Generation and Prover Efficiency in zkEVM Circuits #1428
Description
While exploring prover-side performance in zkEVM, I’ve noticed potential bottlenecks in handling large proof sizes, particularly when multiple commitments are required. I suggest exploring incremental SNARK generation techniques or parallelizing certain components of the circuit to improve the overall efficiency. Additionally, incorporating a dynamic memory allocation approach could significantly reduce prover time. Would love to collaborate on exploring these potential optimizations further.