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[X86][GISel] Add missing legalization for G_IMPLICIT_DEF (llvm#161699)
Legalize scalar and vector integer types for `G_IMPLICIT_DEF` at SSE2/AVX2/AVX-512 widths. This is groundwork for upcoming `G_*_VECTOR` legalization, since vector inserts/builds rely on undef bases.
1 parent a9ca220 commit a13ff2c

10 files changed

+308
-34
lines changed

‎llvm/lib/Target/X86/GISel/X86InstructionSelector.cpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -407,6 +407,7 @@ bool X86InstructionSelector::select(MachineInstr &I) {
407407
case TargetOpcode::G_TRUNC:
408408
return selectTruncOrPtrToInt(I, MRI, MF);
409409
case TargetOpcode::G_INTTOPTR:
410+
case TargetOpcode::G_FREEZE:
410411
return selectCopy(I, MRI);
411412
case TargetOpcode::G_ZEXT:
412413
return selectZext(I, MRI, MF);

‎llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp‎

Lines changed: 22 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -89,9 +89,29 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
8989
// 32/64-bits needs support for s64/s128 to handle cases:
9090
// s64 = EXTEND (G_IMPLICIT_DEF s32) -> s64 = G_IMPLICIT_DEF
9191
// s128 = EXTEND (G_IMPLICIT_DEF s32/s64) -> s128 = G_IMPLICIT_DEF
92-
getActionDefinitionsBuilder(G_IMPLICIT_DEF)
92+
getActionDefinitionsBuilder(
93+
{G_IMPLICIT_DEF, G_PHI, G_FREEZE, G_CONSTANT_FOLD_BARRIER})
9394
.legalFor({p0, s1, s8, s16, s32, s64})
94-
.legalFor(Is64Bit, {s128});
95+
.legalFor(UseX87, {s80})
96+
.legalFor(Is64Bit, {s128})
97+
.legalFor(HasSSE2, {v16s8, v8s16, v4s32, v2s64})
98+
.legalFor(HasAVX, {v32s8, v16s16, v8s32, v4s64})
99+
.legalFor(HasAVX512, {v64s8, v32s16, v16s32, v8s64})
100+
.widenScalarOrEltToNextPow2(0, /*Min=*/8)
101+
.clampScalarOrElt(0, s8, sMaxScalar)
102+
.moreElementsToNextPow2(0)
103+
.clampMinNumElements(0, s8, 16)
104+
.clampMinNumElements(0, s16, 8)
105+
.clampMinNumElements(0, s32, 4)
106+
.clampMinNumElements(0, s64, 2)
107+
.clampMaxNumElements(0, s8, HasAVX512 ? 64 : (HasAVX ? 32 : 16))
108+
.clampMaxNumElements(0, s16, HasAVX512 ? 32 : (HasAVX ? 16 : 8))
109+
.clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX ? 8 : 4))
110+
.clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX ? 4 : 2))
111+
.clampMaxNumElements(0, p0,
112+
Is64Bit ? s64MaxVector.getNumElements()
113+
: s32MaxVector.getNumElements())
114+
.scalarizeIf(scalarOrEltWiderThan(0, 64), 0);
95115

96116
getActionDefinitionsBuilder(G_CONSTANT)
97117
.legalFor({p0, s8, s16, s32})
@@ -289,26 +309,6 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
289309
.clampScalar(1, s16, sMaxScalar)
290310
.scalarSameSizeAs(0, 1);
291311

292-
// control flow
293-
getActionDefinitionsBuilder(G_PHI)
294-
.legalFor({s8, s16, s32, p0})
295-
.legalFor(UseX87, {s80})
296-
.legalFor(Is64Bit, {s64})
297-
.legalFor(HasSSE1, {v16s8, v8s16, v4s32, v2s64})
298-
.legalFor(HasAVX, {v32s8, v16s16, v8s32, v4s64})
299-
.legalFor(HasAVX512, {v64s8, v32s16, v16s32, v8s64})
300-
.clampMinNumElements(0, s8, 16)
301-
.clampMinNumElements(0, s16, 8)
302-
.clampMinNumElements(0, s32, 4)
303-
.clampMinNumElements(0, s64, 2)
304-
.clampMaxNumElements(0, s8, HasAVX512 ? 64 : (HasAVX ? 32 : 16))
305-
.clampMaxNumElements(0, s16, HasAVX512 ? 32 : (HasAVX ? 16 : 8))
306-
.clampMaxNumElements(0, s32, HasAVX512 ? 16 : (HasAVX ? 8 : 4))
307-
.clampMaxNumElements(0, s64, HasAVX512 ? 8 : (HasAVX ? 4 : 2))
308-
.widenScalarToNextPow2(0, /*Min=*/32)
309-
.clampScalar(0, s8, sMaxScalar)
310-
.scalarize(0);
311-
312312
getActionDefinitionsBuilder(G_BRCOND).legalFor({s1});
313313

314314
// pointer handling
@@ -592,11 +592,6 @@ X86LegalizerInfo::X86LegalizerInfo(const X86Subtarget &STI,
592592
.minScalar(0, LLT::scalar(32))
593593
.libcall();
594594

595-
getActionDefinitionsBuilder({G_FREEZE, G_CONSTANT_FOLD_BARRIER})
596-
.legalFor({s8, s16, s32, s64, p0})
597-
.widenScalarToNextPow2(0, /*Min=*/8)
598-
.clampScalar(0, s8, sMaxScalar);
599-
600595
getLegacyLegalizerInfo().computeTables();
601596
verify(*STI.getInstrInfo());
602597
}

‎llvm/test/CodeGen/X86/GlobalISel/legalize-phi.mir‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -148,21 +148,21 @@ body: |
148148
; CHECK-NEXT: {{ $}}
149149
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
150150
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
151+
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[COPY1]](s32)
151152
; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $edx
153+
; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s1) = G_TRUNC [[COPY2]](s32)
152154
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
153155
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s8) = G_ICMP intpred(sgt), [[COPY]](s32), [[C]]
154-
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s8)
155-
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
156-
; CHECK-NEXT: G_BRCOND [[TRUNC]](s1), %bb.2
156+
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s1) = G_TRUNC [[ICMP]](s8)
157+
; CHECK-NEXT: G_BRCOND [[TRUNC1]](s1), %bb.2
157158
; CHECK-NEXT: {{ $}}
158159
; CHECK-NEXT: bb.1.cond.false:
159160
; CHECK-NEXT: successors: %bb.2(0x80000000)
160161
; CHECK-NEXT: {{ $}}
161-
; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
162-
; CHECK-NEXT: {{ $}}
163162
; CHECK-NEXT: bb.2.cond.end:
164-
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s8) = G_PHI [[TRUNC2]](s8), %bb.1, [[TRUNC1]](s8), %bb.0
165-
; CHECK-NEXT: $al = COPY [[PHI]](s8)
163+
; CHECK-NEXT: [[PHI:%[0-9]+]]:_(s1) = G_PHI [[TRUNC2]](s1), %bb.1, [[TRUNC]](s1), %bb.0
164+
; CHECK-NEXT: [[EXT:%[0-9]+]]:_(s8) = G_ANYEXT [[PHI]](s1)
165+
; CHECK-NEXT: $al = COPY [[EXT]](s8)
166166
; CHECK-NEXT: RET 0, implicit $al
167167
bb.1.entry:
168168
successors: %bb.3(0x40000000), %bb.2(0x40000000)

‎llvm/test/CodeGen/X86/GlobalISel/legalize-undef-vec-scaling.mir‎

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=CHECK,AVX2
2+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=sse2 -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=CHECK,SSE2
3+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=avx512f -run-pass=legalizer -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - | FileCheck %s --check-prefixes=CHECK,AVX512F
4+
5+
6+
---
7+
name: test_basic_g_implicit_def_v8i64
8+
body: |
9+
bb.0:
10+
; CHECK-LABEL: name: test_basic_g_implicit_def_v8i64
11+
; AVX512F: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
12+
; AVX2: [[DEF_AVX2:%[0-9]+]]:_(<4 x s64>) = G_IMPLICIT_DEF
13+
; AVX2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_AVX2]](<4 x s64>), [[DEF_AVX2]](<4 x s64>)
14+
; SSE2: [[DEF_SSE2:%[0-9]+]]:_(<2 x s64>) = G_IMPLICIT_DEF
15+
; SSE2-NEXT: {{%[0-9]+}}:_(<8 x s64>) = G_CONCAT_VECTORS [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>), [[DEF_SSE2]](<2 x s64>)
16+
%0:_(<8 x s64>) = G_IMPLICIT_DEF
17+
RET 0, implicit %0
18+
...
19+
20+
---
21+
name: test_g_implicit_def_cample_size
22+
body: |
23+
bb.1:
24+
; CHECK-LABEL: name: test_g_implicit_def_cample_size
25+
; AVX512: {{%[0-9]+}}:_(<8 x s64>) = G_IMPLICIT_DEF
26+
; AVX2: {{%[0-9]+}}:_(<4 x s64>) = G_IMPLICIT_DEF
27+
; SSE2: {{%[0-9]+}}:_(<2 x s64>) = G_IMPLICIT_DEF
28+
%0:_(<5 x s63>) = G_IMPLICIT_DEF
29+
RET 0, implicit %0
30+
...
31+
32+

‎llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier-vec256.mir‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
---
4+
name: select_cfb_vec256
5+
legalized: true
6+
regBankSelected: true
7+
registers:
8+
- { id: 0, class: vecr, preferred-register: '', flags: [ ] }
9+
- { id: 1, class: vecr, preferred-register: '', flags: [ ] }
10+
body: |
11+
bb.0:
12+
liveins: $ymm0
13+
14+
; CHECK-LABEL: name: select_cfb_vec256
15+
; CHECK: [[COPY:%[0-9]+]]:vr256 = COPY $ymm0
16+
; CHECK-NOT: G_CONSTANT_FOLD_BARRIER
17+
; CHECK-NEXT: $ymm1 = COPY [[COPY]]
18+
; CHECK-NEXT: RET 0, implicit $ymm1
19+
%0:vecr(<8 x s32>) = COPY $ymm0
20+
%1:vecr(<8 x s32>) = G_CONSTANT_FOLD_BARRIER %0
21+
$ymm1 = COPY %1(<8 x s32>)
22+
RET 0, implicit $ymm1
23+
...

‎llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier-vec512.mir‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
---
4+
name: select_cfb_vec512
5+
legalized: true
6+
regBankSelected: true
7+
registers:
8+
- { id: 0, class: vecr, preferred-register: '', flags: [ ] }
9+
- { id: 1, class: vecr, preferred-register: '', flags: [ ] }
10+
body: |
11+
bb.0:
12+
liveins: $zmm0
13+
14+
; CHECK-LABEL: name: select_cfb_vec512
15+
; CHECK: [[COPY:%[0-9]+]]:vr512 = COPY $zmm0
16+
; CHECK-NOT: G_CONSTANT_FOLD_BARRIER
17+
; CHECK-NEXT: $zmm1 = COPY [[COPY]]
18+
; CHECK-NEXT: RET 0, implicit $zmm1
19+
%0:vecr(<8 x s64>) = COPY $zmm0
20+
%1:vecr(<8 x s64>) = G_CONSTANT_FOLD_BARRIER %0
21+
$zmm1 = COPY %1(<8 x s64>)
22+
RET 0, implicit $zmm1
23+
...

‎llvm/test/CodeGen/X86/GlobalISel/select-constant-fold-barrier.mir‎

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
4+
---
5+
name: select_cfb_scalar_s32
6+
legalized: true
7+
regBankSelected: true
8+
registers:
9+
- { id: 0, class: gpr, preferred-register: '', flags: [ ] }
10+
- { id: 1, class: gpr, preferred-register: '', flags: [ ] }
11+
liveins:
12+
fixedStack:
13+
stack:
14+
constants:
15+
body: |
16+
bb.0:
17+
liveins: $edi
18+
19+
; CHECK-LABEL: name: select_cfb_scalar_s32
20+
; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
21+
; CHECK-NOT: G_CONSTANT_FOLD_BARRIER
22+
; CHECK-NEXT: $eax = COPY [[COPY]]
23+
; CHECK-NEXT: RET 0, implicit $eax
24+
%0:gpr(s32) = COPY $edi
25+
%1:gpr(s32) = G_CONSTANT_FOLD_BARRIER %0
26+
$eax = COPY %1(s32)
27+
RET 0, implicit $eax
28+
...
29+
30+
---
31+
name: select_cfb_scalar_s64
32+
legalized: true
33+
regBankSelected: true
34+
registers:
35+
- { id: 0, class: gpr, preferred-register: '', flags: [ ] }
36+
- { id: 1, class: gpr, preferred-register: '', flags: [ ] }
37+
liveins:
38+
fixedStack:
39+
stack:
40+
constants:
41+
body: |
42+
bb.0:
43+
liveins: $rdi
44+
45+
; CHECK-LABEL: name: select_cfb_scalar_s64
46+
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
47+
; CHECK-NOT: G_CONSTANT_FOLD_BARRIER
48+
; CHECK-NEXT: $rax = COPY [[COPY]]
49+
; CHECK-NEXT: RET 0, implicit $rax
50+
%0:gpr(s64) = COPY $rdi
51+
%1:gpr(s64) = G_CONSTANT_FOLD_BARRIER %0
52+
$rax = COPY %1(s64)
53+
RET 0, implicit $rax
54+
...
55+
56+
57+
---
58+
name: select_cfb_vec128
59+
legalized: true
60+
regBankSelected: true
61+
registers:
62+
- { id: 0, class: vecr, preferred-register: '', flags: [ ] }
63+
- { id: 1, class: vecr, preferred-register: '', flags: [ ] }
64+
body: |
65+
bb.0:
66+
liveins: $xmm0
67+
68+
; CHECK-LABEL: name: select_cfb_vec128
69+
; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
70+
; CHECK-NOT: G_CONSTANT_FOLD_BARRIER
71+
; CHECK-NEXT: $xmm1 = COPY [[COPY]]
72+
; CHECK-NEXT: RET 0, implicit $xmm1
73+
%0:vecr(<4 x s32>) = COPY $xmm0
74+
%1:vecr(<4 x s32>) = G_CONSTANT_FOLD_BARRIER %0
75+
$xmm1 = COPY %1(<4 x s32>)
76+
RET 0, implicit $xmm1
77+
...

‎llvm/test/CodeGen/X86/GlobalISel/select-freeze-vec256.mir‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
---
4+
name: select_freeze_vec256
5+
legalized: true
6+
regBankSelected: true
7+
registers:
8+
- { id: 0, class: vecr, preferred-register: '', flags: [ ] }
9+
- { id: 1, class: vecr, preferred-register: '', flags: [ ] }
10+
body: |
11+
bb.0:
12+
liveins: $ymm0
13+
14+
; CHECK-LABEL: name: select_freeze_vec256
15+
; CHECK: [[COPY:%[0-9]+]]:vr256 = COPY $ymm0
16+
; CHECK-NOT: G_FREEZE
17+
; CHECK-NEXT: $ymm1 = COPY [[COPY]]
18+
; CHECK-NEXT: RET 0, implicit $ymm1
19+
%0:vecr(<8 x s32>) = COPY $ymm0
20+
%1:vecr(<8 x s32>) = G_FREEZE %0
21+
$ymm1 = COPY %1(<8 x s32>)
22+
RET 0, implicit $ymm1
23+
...

‎llvm/test/CodeGen/X86/GlobalISel/select-freeze-vec512.mir‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,23 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+avx512f -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
---
4+
name: select_freeze_vec512
5+
legalized: true
6+
regBankSelected: true
7+
registers:
8+
- { id: 0, class: vecr, preferred-register: '', flags: [ ] }
9+
- { id: 1, class: vecr, preferred-register: '', flags: [ ] }
10+
body: |
11+
bb.0:
12+
liveins: $zmm0
13+
14+
; CHECK-LABEL: name: select_freeze_vec512
15+
; CHECK: [[COPY:%[0-9]+]]:vr512 = COPY $zmm0
16+
; CHECK-NOT: G_FREEZE
17+
; CHECK-NEXT: $zmm1 = COPY [[COPY]]
18+
; CHECK-NEXT: RET 0, implicit $zmm1
19+
%0:vecr(<8 x s64>) = COPY $zmm0
20+
%1:vecr(<8 x s64>) = G_FREEZE %0
21+
$zmm1 = COPY %1(<8 x s64>)
22+
RET 0, implicit $zmm1
23+
...

‎llvm/test/CodeGen/X86/GlobalISel/select-freeze.mir‎

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
2+
3+
4+
---
5+
name: select_freeze_scalar_s32
6+
legalized: true
7+
regBankSelected: true
8+
registers:
9+
- { id: 0, class: gpr, preferred-register: '', flags: [ ] }
10+
- { id: 1, class: gpr, preferred-register: '', flags: [ ] }
11+
liveins:
12+
fixedStack:
13+
stack:
14+
constants:
15+
body: |
16+
bb.0:
17+
liveins: $edi
18+
19+
; CHECK-LABEL: name: select_freeze_scalar_s32
20+
; CHECK: [[COPY:%[0-9]+]]:gr32 = COPY $edi
21+
; CHECK-NOT: G_FREEZE
22+
; CHECK-NEXT: $eax = COPY [[COPY]]
23+
; CHECK-NEXT: RET 0, implicit $eax
24+
%0:gpr(s32) = COPY $edi
25+
%1:gpr(s32) = G_FREEZE %0
26+
$eax = COPY %1(s32)
27+
RET 0, implicit $eax
28+
...
29+
30+
---
31+
name: select_freeze_scalar_s64
32+
legalized: true
33+
regBankSelected: true
34+
registers:
35+
- { id: 0, class: gpr, preferred-register: '', flags: [ ] }
36+
- { id: 1, class: gpr, preferred-register: '', flags: [ ] }
37+
liveins:
38+
fixedStack:
39+
stack:
40+
constants:
41+
body: |
42+
bb.0:
43+
liveins: $rdi
44+
45+
; CHECK-LABEL: name: select_freeze_scalar_s64
46+
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
47+
; CHECK-NOT: G_FREEZE
48+
; CHECK-NEXT: $rax = COPY [[COPY]]
49+
; CHECK-NEXT: RET 0, implicit $rax
50+
%0:gpr(s64) = COPY $rdi
51+
%1:gpr(s64) = G_FREEZE %0
52+
$rax = COPY %1(s64)
53+
RET 0, implicit $rax
54+
...
55+
56+
57+
---
58+
name: select_freeze_vec128
59+
legalized: true
60+
regBankSelected: true
61+
registers:
62+
- { id: 0, class: vecr, preferred-register: '', flags: [ ] }
63+
- { id: 1, class: vecr, preferred-register: '', flags: [ ] }
64+
body: |
65+
bb.0:
66+
liveins: $xmm0
67+
68+
; CHECK-LABEL: name: select_freeze_vec128
69+
; CHECK: [[COPY:%[0-9]+]]:vr128 = COPY $xmm0
70+
; CHECK-NOT: G_FREEZE
71+
; CHECK-NEXT: $xmm1 = COPY [[COPY]]
72+
; CHECK-NEXT: RET 0, implicit $xmm1
73+
%0:vecr(<4 x s32>) = COPY $xmm0
74+
%1:vecr(<4 x s32>) = G_FREEZE %0
75+
$xmm1 = COPY %1(<4 x s32>)
76+
RET 0, implicit $xmm1
77+
...

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