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CACHEFLUSH: More resilient cache invalidate tests
Signed-off-by: Indan Zupancic <indan@nul.nu>
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  • apps/sel4test-tests/src/tests

1 file changed

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apps/sel4test-tests/src/tests/cache.c

Lines changed: 20 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -90,19 +90,16 @@ static int test_page_flush(env_t env)
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test_assert(*ptrc == 0xDEADBEEF);
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error = seL4_ARM_Page_Invalidate_Data(framec, 0, PAGE_SIZE_4K);
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assert(!error);
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/* In case the invalidation performs an implicit clean, write a new
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value to RAM and make sure the cached read retrieves it
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Remember to drain any store buffer!
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*/
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*ptr = 0xBEEFCAFE;
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#if defined(CONFIG_ARCH_AARCH32)
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asm volatile("dmb" ::: "memory");
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#elif defined(CONFIG_ARCH_AARCH64)
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asm volatile("dmb sy" ::: "memory");
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#endif /* CONFIG_ARCH_AARCHxx */
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test_assert(*ptrc == 0xBEEFCAFE);
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test_assert(*ptr == 0xBEEFCAFE);
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/*
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* If invalidate works, both reads should get the uncached value.
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*
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* If invalidate does an implicit clean, both reads should get the cached value.
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* The latter is also true if a random cache eviction happens before the call to
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* seL4_ARM_Page_Invalidate_Data finishes.
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*
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* Whatever happens, both values should always be the same now.
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*/
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test_assert(*ptr == *ptrc);
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return sel4test_get_result();
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}
@@ -232,15 +229,16 @@ static int test_page_directory_flush(env_t env)
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test_assert(*ptrc == 0xDEADBEEF);
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err = seL4_ARCH_PageDirectory_Invalidate_Data(env->page_directory, vstartc, vstartc + PAGE_SIZE_4K);
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assert(!err);
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/* In case the invalidation performs an implicit clean, write a new
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value to RAM and make sure the cached read retrieves it.
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Need to do an invalidate before retrieving though to guard
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against speculative loads */
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*ptr = 0xBEEFCAFE;
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err = seL4_ARCH_PageDirectory_Invalidate_Data(env->page_directory, vstartc, vstartc + PAGE_SIZE_4K);
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assert(!err);
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test_assert(*ptrc == 0xBEEFCAFE);
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test_assert(*ptr == 0xBEEFCAFE);
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/*
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* If invalidate works, both reads should get the uncached value.
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*
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* If invalidate does an implicit clean, both reads should get the cached value.
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* The latter is also true if a random cache eviction happens before the call to
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* seL4_ARM_Page_Invalidate_Data finishes.
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*
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* Whatever happens, both values should always be the same now.
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*/
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test_assert(*ptr == *ptrc);
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return sel4test_get_result();
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}

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