@@ -90,25 +90,26 @@ enum AttrType : unsigned {
9090
9191// Legal Values for CPU_arch, (=6), uleb128
9292enum CPUArch {
93- Pre_v4 = 0 ,
94- v4 = 1 , // e.g. SA110
95- v4T = 2 , // e.g. ARM7TDMI
96- v5T = 3 , // e.g. ARM9TDMI
97- v5TE = 4 , // e.g. ARM946E_S
98- v5TEJ = 5 , // e.g. ARM926EJ_S
99- v6 = 6 , // e.g. ARM1136J_S
100- v6KZ = 7 , // e.g. ARM1176JZ_S
101- v6T2 = 8 , // e.g. ARM1156T2_S
102- v6K = 9 , // e.g. ARM1176JZ_S
103- v7 = 10 , // e.g. Cortex A8, Cortex M3
104- v6_M = 11 , // e.g. Cortex M1
105- v6S_M = 12 , // v6_M with the System extensions
106- v7E_M = 13 , // v7_M with DSP extensions
107- v8_A = 14 , // v8_A AArch32
108- v8_R = 15 , // e.g. Cortex R52
109- v8_M_Base= 16 , // v8_M_Base AArch32
110- v8_M_Main= 17 , // v8_M_Main AArch32
111- v8_1_M_Main=21 , // v8_1_M_Main AArch32
93+ Pre_v4 = 0 ,
94+ v4 = 1 , // e.g. SA110
95+ v4T = 2 , // e.g. ARM7TDMI
96+ v5T = 3 , // e.g. ARM9TDMI
97+ v5TE = 4 , // e.g. ARM946E_S
98+ v5TEJ = 5 , // e.g. ARM926EJ_S
99+ v6 = 6 , // e.g. ARM1136J_S
100+ v6KZ = 7 , // e.g. ARM1176JZ_S
101+ v6T2 = 8 , // e.g. ARM1156T2_S
102+ v6K = 9 , // e.g. ARM1176JZ_S
103+ v7 = 10 , // e.g. Cortex A8, Cortex M3
104+ v6_M = 11 , // e.g. Cortex M1
105+ v6S_M = 12 , // v6_M with the System extensions
106+ v7E_M = 13 , // v7_M with DSP extensions
107+ v8_A = 14 , // v8_A AArch32
108+ v8_R = 15 , // e.g. Cortex R52
109+ v8_M_Base = 16 , // v8_M_Base AArch32
110+ v8_M_Main = 17 , // v8_M_Main AArch32
111+ v8_1_M_Main = 21 , // v8_1_M_Main AArch32
112+ v9_A = 22 , // v9_A AArch32
112113};
113114
114115enum CPUArchProfile { // (=7), uleb128
0 commit comments