@@ -50,7 +50,7 @@ class RISCVFoldMasks : public MachineFunctionPass {
5050private:
5151 bool convertVMergeToVMv (MachineInstr &MI, MachineInstr *MaskDef);
5252
53- bool isAllOnesMask (MachineInstr *MaskCopy );
53+ bool isAllOnesMask (MachineInstr *MaskDef );
5454};
5555
5656} // namespace
@@ -59,22 +59,21 @@ char RISCVFoldMasks::ID = 0;
5959
6060INITIALIZE_PASS (RISCVFoldMasks, DEBUG_TYPE, " RISC-V Fold Masks" , false , false )
6161
62- bool RISCVFoldMasks::isAllOnesMask(MachineInstr *MaskCopy ) {
63- if (!MaskCopy )
62+ bool RISCVFoldMasks::isAllOnesMask(MachineInstr *MaskDef ) {
63+ if (!MaskDef )
6464 return false ;
65- assert (MaskCopy->isCopy () && MaskCopy->getOperand (0 ).getReg () == RISCV::V0);
66- Register SrcReg =
67- TRI->lookThruCopyLike (MaskCopy->getOperand (1 ).getReg (), MRI);
65+ assert (MaskDef->isCopy () && MaskDef->getOperand (0 ).getReg () == RISCV::V0);
66+ Register SrcReg = TRI->lookThruCopyLike (MaskDef->getOperand (1 ).getReg (), MRI);
6867 if (!SrcReg.isVirtual ())
6968 return false ;
70- MachineInstr *SrcDef = MRI->getVRegDef (SrcReg);
71- if (!SrcDef )
69+ MaskDef = MRI->getVRegDef (SrcReg);
70+ if (!MaskDef )
7271 return false ;
7372
7473 // TODO: Check that the VMSET is the expected bitwidth? The pseudo has
7574 // undefined behaviour if it's the wrong bitwidth, so we could choose to
7675 // assume that it's all-ones? Same applies to its VL.
77- switch (SrcDef ->getOpcode ()) {
76+ switch (MaskDef ->getOpcode ()) {
7877 case RISCV::PseudoVMSET_M_B1:
7978 case RISCV::PseudoVMSET_M_B2:
8079 case RISCV::PseudoVMSET_M_B4:
0 commit comments