Skip to content

Commit 5a8c0f5

Browse files
committed
AMDGPU/GlobalISel: Avoid handling registers twice in waterfall loops
When multiple instructions are moved into a waterfall loop, it's possible some of them re-use the same operands. Avoid creating multiple sequences of readfirstlanes for them. None of the current uses will hit this, but will be used in a future patch.
1 parent dab7bda commit 5a8c0f5

File tree

1 file changed

+17
-1
lines changed

1 file changed

+17
-1
lines changed

llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -747,6 +747,10 @@ bool AMDGPURegisterBankInfo::executeInWaterfallLoop(
747747
SmallVector<Register, 4> InitResultRegs;
748748
SmallVector<Register, 4> PhiRegs;
749749

750+
// Track use registers which have already been expanded with a readfirstlane
751+
// sequence. This may have multiple uses if moving a sequence.
752+
DenseMap<Register, Register> WaterfalledRegMap;
753+
750754
MachineBasicBlock &MBB = B.getMBB();
751755
MachineFunction *MF = &B.getMF();
752756

@@ -853,9 +857,18 @@ bool AMDGPURegisterBankInfo::executeInWaterfallLoop(
853857
if (!Op.isReg() || Op.isDef())
854858
continue;
855859

856-
if (!SGPROperandRegs.count(Op.getReg()))
860+
Register OldReg = Op.getReg();
861+
if (!SGPROperandRegs.count(OldReg))
857862
continue;
858863

864+
// See if we already processed this register in another instruction in the
865+
// sequence.
866+
auto OldVal = WaterfalledRegMap.find(OldReg);
867+
if (OldVal != WaterfalledRegMap.end()) {
868+
Op.setReg(OldVal->second);
869+
continue;
870+
}
871+
859872
LLT OpTy = MRI.getType(Op.getReg());
860873
unsigned OpSize = OpTy.getSizeInBits();
861874

@@ -1001,6 +1014,9 @@ bool AMDGPURegisterBankInfo::executeInWaterfallLoop(
10011014

10021015
MRI.setRegBank(Op.getReg(), AMDGPU::SGPRRegBank);
10031016
}
1017+
1018+
// Make sure we don't re-process this register again.
1019+
WaterfalledRegMap.insert(std::make_pair(OldReg, Op.getReg()));
10041020
}
10051021
}
10061022

0 commit comments

Comments
 (0)