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[DAGCombiner] Use the right thumbv7meb triple for ARM big-endian test.
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‎llvm/test/CodeGen/ARM/load-combine-big-endian.ll‎

Lines changed: 71 additions & 93 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=armeb-unknown | FileCheck %s
33
; RUN: llc < %s -mtriple=armv6eb-unknown | FileCheck %s --check-prefix=CHECK-ARMv6
4-
; RUN: llc < %s -mtriple=thumbv6m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv6
5-
; RUN: llc < %s -mtriple=thumbv7m-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv7
4+
; RUN: llc < %s -mtriple=thumbv6meb-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv6
5+
; RUN: llc < %s -mtriple=thumbv6meb-none-eabi | FileCheck %s --check-prefix=CHECK-THUMBv7
66

77
; i8* p; // p is 4 byte aligned
88
; ((i32) p[0] << 24) | ((i32) p[1] << 16) | ((i32) p[2] << 8) | (i32) p[3]
@@ -20,13 +20,11 @@ define i32 @load_i32_by_i8_big_endian(i32* %arg) {
2020
; CHECK-THUMBv6-LABEL: load_i32_by_i8_big_endian:
2121
; CHECK-THUMBv6: @ %bb.0:
2222
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
23-
; CHECK-THUMBv6-NEXT: rev r0, r0
2423
; CHECK-THUMBv6-NEXT: bx lr
2524
;
2625
; CHECK-THUMBv7-LABEL: load_i32_by_i8_big_endian:
2726
; CHECK-THUMBv7: @ %bb.0:
2827
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
29-
; CHECK-THUMBv7-NEXT: rev r0, r0
3028
; CHECK-THUMBv7-NEXT: bx lr
3129

3230
%tmp = bitcast i32* %arg to i8*
@@ -75,11 +73,13 @@ define i32 @load_i32_by_i8_bswap(i32* %arg) {
7573
; CHECK-THUMBv6-LABEL: load_i32_by_i8_bswap:
7674
; CHECK-THUMBv6: @ %bb.0:
7775
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
76+
; CHECK-THUMBv6-NEXT: rev r0, r0
7877
; CHECK-THUMBv6-NEXT: bx lr
7978
;
8079
; CHECK-THUMBv7-LABEL: load_i32_by_i8_bswap:
8180
; CHECK-THUMBv7: @ %bb.0:
8281
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
82+
; CHECK-THUMBv7-NEXT: rev r0, r0
8383
; CHECK-THUMBv7-NEXT: bx lr
8484

8585
%tmp = bitcast i32* %arg to i8*
@@ -120,13 +120,11 @@ define i32 @load_i32_by_i16_by_i8_big_endian(i32* %arg) {
120120
; CHECK-THUMBv6-LABEL: load_i32_by_i16_by_i8_big_endian:
121121
; CHECK-THUMBv6: @ %bb.0:
122122
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
123-
; CHECK-THUMBv6-NEXT: rev r0, r0
124123
; CHECK-THUMBv6-NEXT: bx lr
125124
;
126125
; CHECK-THUMBv7-LABEL: load_i32_by_i16_by_i8_big_endian:
127126
; CHECK-THUMBv7: @ %bb.0:
128127
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
129-
; CHECK-THUMBv7-NEXT: rev r0, r0
130128
; CHECK-THUMBv7-NEXT: bx lr
131129

132130
%tmp = bitcast i32* %arg to i8*
@@ -167,20 +165,12 @@ define i32 @load_i32_by_i16(i32* %arg) {
167165
;
168166
; CHECK-THUMBv6-LABEL: load_i32_by_i16:
169167
; CHECK-THUMBv6: @ %bb.0:
170-
; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #2]
171-
; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #3]
172-
; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
173-
; CHECK-THUMBv6-NEXT: adds r1, r2, r1
174-
; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
175-
; CHECK-THUMBv6-NEXT: lsls r0, r0, #16
176-
; CHECK-THUMBv6-NEXT: adds r0, r0, r1
168+
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
177169
; CHECK-THUMBv6-NEXT: bx lr
178170
;
179171
; CHECK-THUMBv7-LABEL: load_i32_by_i16:
180172
; CHECK-THUMBv7: @ %bb.0:
181-
; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
182-
; CHECK-THUMBv7-NEXT: ldrh r0, [r0, #2]
183-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
173+
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
184174
; CHECK-THUMBv7-NEXT: bx lr
185175

186176
%tmp = bitcast i32* %arg to i16*
@@ -210,22 +200,12 @@ define i32 @load_i32_by_i16_i8(i32* %arg) {
210200
;
211201
; CHECK-THUMBv6-LABEL: load_i32_by_i16_i8:
212202
; CHECK-THUMBv6: @ %bb.0:
213-
; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #3]
214-
; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #2]
215-
; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
216-
; CHECK-THUMBv6-NEXT: adds r1, r2, r1
217-
; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
218-
; CHECK-THUMBv6-NEXT: lsls r0, r0, #16
219-
; CHECK-THUMBv6-NEXT: adds r0, r1, r0
203+
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
220204
; CHECK-THUMBv6-NEXT: bx lr
221205
;
222206
; CHECK-THUMBv7-LABEL: load_i32_by_i16_i8:
223207
; CHECK-THUMBv7: @ %bb.0:
224-
; CHECK-THUMBv7-NEXT: ldrb r2, [r0, #2]
225-
; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
226-
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #3]
227-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r2, lsl #8
228-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
208+
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
229209
; CHECK-THUMBv7-NEXT: bx lr
230210

231211
%tmp = bitcast i32* %arg to i16*
@@ -277,14 +257,18 @@ define i64 @load_i64_by_i8_bswap(i64* %arg) {
277257
;
278258
; CHECK-THUMBv6-LABEL: load_i64_by_i8_bswap:
279259
; CHECK-THUMBv6: @ %bb.0:
280-
; CHECK-THUMBv6-NEXT: ldr r2, [r0]
281-
; CHECK-THUMBv6-NEXT: ldr r1, [r0, #4]
282-
; CHECK-THUMBv6-NEXT: mov r0, r2
260+
; CHECK-THUMBv6-NEXT: ldr r1, [r0]
261+
; CHECK-THUMBv6-NEXT: ldr r0, [r0, #4]
262+
; CHECK-THUMBv6-NEXT: rev r0, r0
263+
; CHECK-THUMBv6-NEXT: rev r1, r1
283264
; CHECK-THUMBv6-NEXT: bx lr
284265
;
285266
; CHECK-THUMBv7-LABEL: load_i64_by_i8_bswap:
286267
; CHECK-THUMBv7: @ %bb.0:
287-
; CHECK-THUMBv7-NEXT: ldrd r0, r1, [r0]
268+
; CHECK-THUMBv7-NEXT: ldr r1, [r0]
269+
; CHECK-THUMBv7-NEXT: ldr r0, [r0, #4]
270+
; CHECK-THUMBv7-NEXT: rev r0, r0
271+
; CHECK-THUMBv7-NEXT: rev r1, r1
288272
; CHECK-THUMBv7-NEXT: bx lr
289273

290274
%tmp = bitcast i64* %arg to i8*
@@ -345,17 +329,16 @@ define i64 @load_i64_by_i8(i64* %arg) {
345329
;
346330
; CHECK-THUMBv6-LABEL: load_i64_by_i8:
347331
; CHECK-THUMBv6: @ %bb.0:
348-
; CHECK-THUMBv6-NEXT: ldr r1, [r0]
349-
; CHECK-THUMBv6-NEXT: ldr r0, [r0, #4]
350-
; CHECK-THUMBv6-NEXT: rev r0, r0
351-
; CHECK-THUMBv6-NEXT: rev r1, r1
332+
; CHECK-THUMBv6-NEXT: ldr r2, [r0]
333+
; CHECK-THUMBv6-NEXT: ldr r1, [r0, #4]
334+
; CHECK-THUMBv6-NEXT: mov r0, r2
352335
; CHECK-THUMBv6-NEXT: bx lr
353336
;
354337
; CHECK-THUMBv7-LABEL: load_i64_by_i8:
355338
; CHECK-THUMBv7: @ %bb.0:
356-
; CHECK-THUMBv7-NEXT: ldrd r1, r0, [r0]
357-
; CHECK-THUMBv7-NEXT: rev r0, r0
358-
; CHECK-THUMBv7-NEXT: rev r1, r1
339+
; CHECK-THUMBv7-NEXT: ldr r2, [r0]
340+
; CHECK-THUMBv7-NEXT: ldr r1, [r0, #4]
341+
; CHECK-THUMBv7-NEXT: mov r0, r2
359342
; CHECK-THUMBv7-NEXT: bx lr
360343

361344
%tmp = bitcast i64* %arg to i8*
@@ -424,11 +407,14 @@ define i32 @load_i32_by_i8_nonzero_offset(i32* %arg) {
424407
; CHECK-THUMBv6: @ %bb.0:
425408
; CHECK-THUMBv6-NEXT: movs r1, #1
426409
; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]
410+
; CHECK-THUMBv6-NEXT: rev r0, r0
427411
; CHECK-THUMBv6-NEXT: bx lr
428412
;
429413
; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset:
430414
; CHECK-THUMBv7: @ %bb.0:
431-
; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #1]
415+
; CHECK-THUMBv7-NEXT: movs r1, #1
416+
; CHECK-THUMBv7-NEXT: ldr r0, [r0, r1]
417+
; CHECK-THUMBv7-NEXT: rev r0, r0
432418
; CHECK-THUMBv7-NEXT: bx lr
433419

434420

@@ -479,11 +465,14 @@ define i32 @load_i32_by_i8_neg_offset(i32* %arg) {
479465
; CHECK-THUMBv6: @ %bb.0:
480466
; CHECK-THUMBv6-NEXT: subs r0, r0, #4
481467
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
468+
; CHECK-THUMBv6-NEXT: rev r0, r0
482469
; CHECK-THUMBv6-NEXT: bx lr
483470
;
484471
; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset:
485472
; CHECK-THUMBv7: @ %bb.0:
486-
; CHECK-THUMBv7-NEXT: ldr r0, [r0, #-4]
473+
; CHECK-THUMBv7-NEXT: subs r0, r0, #4
474+
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
475+
; CHECK-THUMBv7-NEXT: rev r0, r0
487476
; CHECK-THUMBv7-NEXT: bx lr
488477

489478

@@ -526,13 +515,12 @@ define i32 @load_i32_by_i8_nonzero_offset_bswap(i32* %arg) {
526515
; CHECK-THUMBv6: @ %bb.0:
527516
; CHECK-THUMBv6-NEXT: movs r1, #1
528517
; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]
529-
; CHECK-THUMBv6-NEXT: rev r0, r0
530518
; CHECK-THUMBv6-NEXT: bx lr
531519
;
532520
; CHECK-THUMBv7-LABEL: load_i32_by_i8_nonzero_offset_bswap:
533521
; CHECK-THUMBv7: @ %bb.0:
534-
; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #1]
535-
; CHECK-THUMBv7-NEXT: rev r0, r0
522+
; CHECK-THUMBv7-NEXT: movs r1, #1
523+
; CHECK-THUMBv7-NEXT: ldr r0, [r0, r1]
536524
; CHECK-THUMBv7-NEXT: bx lr
537525

538526

@@ -575,13 +563,12 @@ define i32 @load_i32_by_i8_neg_offset_bswap(i32* %arg) {
575563
; CHECK-THUMBv6: @ %bb.0:
576564
; CHECK-THUMBv6-NEXT: subs r0, r0, #4
577565
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
578-
; CHECK-THUMBv6-NEXT: rev r0, r0
579566
; CHECK-THUMBv6-NEXT: bx lr
580567
;
581568
; CHECK-THUMBv7-LABEL: load_i32_by_i8_neg_offset_bswap:
582569
; CHECK-THUMBv7: @ %bb.0:
583-
; CHECK-THUMBv7-NEXT: ldr r0, [r0, #-4]
584-
; CHECK-THUMBv7-NEXT: rev r0, r0
570+
; CHECK-THUMBv7-NEXT: subs r0, r0, #4
571+
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
585572
; CHECK-THUMBv7-NEXT: bx lr
586573

587574

@@ -632,27 +619,14 @@ define i32 @load_i32_by_bswap_i16(i32* %arg) {
632619
;
633620
; CHECK-THUMBv6-LABEL: load_i32_by_bswap_i16:
634621
; CHECK-THUMBv6: @ %bb.0:
635-
; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #2]
636-
; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #3]
637-
; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
638-
; CHECK-THUMBv6-NEXT: adds r1, r2, r1
639-
; CHECK-THUMBv6-NEXT: rev r1, r1
640-
; CHECK-THUMBv6-NEXT: lsrs r1, r1, #16
641-
; CHECK-THUMBv6-NEXT: lsls r1, r1, #16
642-
; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
643-
; CHECK-THUMBv6-NEXT: rev16 r0, r0
644-
; CHECK-THUMBv6-NEXT: adds r0, r1, r0
622+
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
623+
; CHECK-THUMBv6-NEXT: rev r0, r0
645624
; CHECK-THUMBv6-NEXT: bx lr
646625
;
647626
; CHECK-THUMBv7-LABEL: load_i32_by_bswap_i16:
648627
; CHECK-THUMBv7: @ %bb.0:
649-
; CHECK-THUMBv7-NEXT: ldrh r1, [r0, #2]
650-
; CHECK-THUMBv7-NEXT: movw r2, #65535
651-
; CHECK-THUMBv7-NEXT: ldrh r0, [r0]
652-
; CHECK-THUMBv7-NEXT: rev r1, r1
628+
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
653629
; CHECK-THUMBv7-NEXT: rev r0, r0
654-
; CHECK-THUMBv7-NEXT: bics r1, r2
655-
; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsr #16
656630
; CHECK-THUMBv7-NEXT: bx lr
657631

658632

@@ -684,20 +658,12 @@ define i32 @load_i32_by_sext_i16(i32* %arg) {
684658
;
685659
; CHECK-THUMBv6-LABEL: load_i32_by_sext_i16:
686660
; CHECK-THUMBv6: @ %bb.0:
687-
; CHECK-THUMBv6-NEXT: ldrb r1, [r0, #2]
688-
; CHECK-THUMBv6-NEXT: ldrb r2, [r0, #3]
689-
; CHECK-THUMBv6-NEXT: lsls r2, r2, #8
690-
; CHECK-THUMBv6-NEXT: adds r1, r2, r1
691-
; CHECK-THUMBv6-NEXT: ldrh r0, [r0]
692-
; CHECK-THUMBv6-NEXT: lsls r0, r0, #16
693-
; CHECK-THUMBv6-NEXT: adds r0, r0, r1
661+
; CHECK-THUMBv6-NEXT: ldr r0, [r0]
694662
; CHECK-THUMBv6-NEXT: bx lr
695663
;
696664
; CHECK-THUMBv7-LABEL: load_i32_by_sext_i16:
697665
; CHECK-THUMBv7: @ %bb.0:
698-
; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
699-
; CHECK-THUMBv7-NEXT: ldrh r0, [r0, #2]
700-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
666+
; CHECK-THUMBv7-NEXT: ldr r0, [r0]
701667
; CHECK-THUMBv7-NEXT: bx lr
702668
%tmp = bitcast i32* %arg to i16*
703669
%tmp1 = load i16, i16* %tmp, align 4
@@ -738,12 +704,14 @@ define i32 @load_i32_by_i8_base_offset_index(i8* %arg, i32 %i) {
738704
; CHECK-THUMBv6: @ %bb.0:
739705
; CHECK-THUMBv6-NEXT: adds r0, r0, r1
740706
; CHECK-THUMBv6-NEXT: ldr r0, [r0, #12]
707+
; CHECK-THUMBv6-NEXT: rev r0, r0
741708
; CHECK-THUMBv6-NEXT: bx lr
742709
;
743710
; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index:
744711
; CHECK-THUMBv7: @ %bb.0:
745-
; CHECK-THUMBv7-NEXT: add r0, r1
712+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
746713
; CHECK-THUMBv7-NEXT: ldr r0, [r0, #12]
714+
; CHECK-THUMBv7-NEXT: rev r0, r0
747715
; CHECK-THUMBv7-NEXT: bx lr
748716
%tmp = add nuw nsw i32 %i, 3
749717
%tmp2 = add nuw nsw i32 %i, 2
@@ -803,12 +771,15 @@ define i32 @load_i32_by_i8_base_offset_index_2(i8* %arg, i32 %i) {
803771
; CHECK-THUMBv6-NEXT: adds r0, r1, r0
804772
; CHECK-THUMBv6-NEXT: movs r1, #13
805773
; CHECK-THUMBv6-NEXT: ldr r0, [r0, r1]
774+
; CHECK-THUMBv6-NEXT: rev r0, r0
806775
; CHECK-THUMBv6-NEXT: bx lr
807776
;
808777
; CHECK-THUMBv7-LABEL: load_i32_by_i8_base_offset_index_2:
809778
; CHECK-THUMBv7: @ %bb.0:
810-
; CHECK-THUMBv7-NEXT: add r0, r1
811-
; CHECK-THUMBv7-NEXT: ldr.w r0, [r0, #13]
779+
; CHECK-THUMBv7-NEXT: adds r0, r1, r0
780+
; CHECK-THUMBv7-NEXT: movs r1, #13
781+
; CHECK-THUMBv7-NEXT: ldr r0, [r0, r1]
782+
; CHECK-THUMBv7-NEXT: rev r0, r0
812783
; CHECK-THUMBv7-NEXT: bx lr
813784

814785
%tmp = add nuw nsw i32 %i, 4
@@ -870,7 +841,8 @@ define i32 @zext_load_i32_by_i8(i32* %arg) {
870841
; CHECK-THUMBv7: @ %bb.0:
871842
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
872843
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
873-
; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #8
844+
; CHECK-THUMBv7-NEXT: lsls r0, r0, #8
845+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
874846
; CHECK-THUMBv7-NEXT: bx lr
875847

876848
%tmp = bitcast i32* %arg to i8*
@@ -916,9 +888,10 @@ define i32 @zext_load_i32_by_i8_shl_8(i32* %arg) {
916888
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_8:
917889
; CHECK-THUMBv7: @ %bb.0:
918890
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
891+
; CHECK-THUMBv7-NEXT: lsls r1, r1, #8
919892
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
920893
; CHECK-THUMBv7-NEXT: lsls r0, r0, #16
921-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8
894+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
922895
; CHECK-THUMBv7-NEXT: bx lr
923896

924897
%tmp = bitcast i32* %arg to i8*
@@ -965,9 +938,10 @@ define i32 @zext_load_i32_by_i8_shl_16(i32* %arg) {
965938
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_shl_16:
966939
; CHECK-THUMBv7: @ %bb.0:
967940
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
941+
; CHECK-THUMBv7-NEXT: lsls r1, r1, #16
968942
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
969943
; CHECK-THUMBv7-NEXT: lsls r0, r0, #24
970-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #16
944+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
971945
; CHECK-THUMBv7-NEXT: bx lr
972946

973947
%tmp = bitcast i32* %arg to i8*
@@ -1010,9 +984,10 @@ define i32 @zext_load_i32_by_i8_bswap(i32* %arg) {
1010984
;
1011985
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap:
1012986
; CHECK-THUMBv7: @ %bb.0:
1013-
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
1014-
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
1015-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8
987+
; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #1]
988+
; CHECK-THUMBv7-NEXT: ldrb r0, [r0]
989+
; CHECK-THUMBv7-NEXT: lsls r0, r0, #8
990+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
1016991
; CHECK-THUMBv7-NEXT: bx lr
1017992

1018993
%tmp = bitcast i32* %arg to i8*
@@ -1057,10 +1032,11 @@ define i32 @zext_load_i32_by_i8_bswap_shl_8(i32* %arg) {
10571032
;
10581033
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_8:
10591034
; CHECK-THUMBv7: @ %bb.0:
1060-
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
1061-
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
1062-
; CHECK-THUMBv7-NEXT: lsls r1, r1, #16
1063-
; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #8
1035+
; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #1]
1036+
; CHECK-THUMBv7-NEXT: lsls r1, r1, #8
1037+
; CHECK-THUMBv7-NEXT: ldrb r0, [r0]
1038+
; CHECK-THUMBv7-NEXT: lsls r0, r0, #16
1039+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
10641040
; CHECK-THUMBv7-NEXT: bx lr
10651041

10661042
%tmp = bitcast i32* %arg to i8*
@@ -1106,10 +1082,11 @@ define i32 @zext_load_i32_by_i8_bswap_shl_16(i32* %arg) {
11061082
;
11071083
; CHECK-THUMBv7-LABEL: zext_load_i32_by_i8_bswap_shl_16:
11081084
; CHECK-THUMBv7: @ %bb.0:
1109-
; CHECK-THUMBv7-NEXT: ldrb r1, [r0]
1110-
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #1]
1111-
; CHECK-THUMBv7-NEXT: lsls r1, r1, #24
1112-
; CHECK-THUMBv7-NEXT: orr.w r0, r1, r0, lsl #16
1085+
; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #1]
1086+
; CHECK-THUMBv7-NEXT: lsls r1, r1, #16
1087+
; CHECK-THUMBv7-NEXT: ldrb r0, [r0]
1088+
; CHECK-THUMBv7-NEXT: lsls r0, r0, #24
1089+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
11131090
; CHECK-THUMBv7-NEXT: bx lr
11141091

11151092
%tmp = bitcast i32* %arg to i8*
@@ -1156,9 +1133,10 @@ define i16 @load_i16_from_nonzero_offset(i8* %p) {
11561133
;
11571134
; CHECK-THUMBv7-LABEL: load_i16_from_nonzero_offset:
11581135
; CHECK-THUMBv7: @ %bb.0:
1159-
; CHECK-THUMBv7-NEXT: ldrh r1, [r0]
1160-
; CHECK-THUMBv7-NEXT: ldrb r0, [r0, #2]
1161-
; CHECK-THUMBv7-NEXT: orr.w r0, r0, r1, lsl #8
1136+
; CHECK-THUMBv7-NEXT: ldrb r1, [r0, #2]
1137+
; CHECK-THUMBv7-NEXT: ldrh r0, [r0]
1138+
; CHECK-THUMBv7-NEXT: lsls r0, r0, #8
1139+
; CHECK-THUMBv7-NEXT: adds r0, r0, r1
11621140
; CHECK-THUMBv7-NEXT: bx lr
11631141

11641142
%p1.i16 = bitcast i8* %p to i16*

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