Add intrinsic support for XSFVFNRCLIPXFQF extension

Author: yulong18

gcc/config/riscv/riscv-vector-builtins-bases.cc

@@ -705,6 +705,31 @@ class vnclip : public function_base
   }
 };
 
+/* Implements vfnrclip.  */
+class vfnrclip : public function_base
+{
+public:
+  bool has_merge_operand_p () const override { return false; }
+  bool may_require_qfrm_p () const override { return true; }
+  bool can_be_overloaded_p (enum predication_type_index pred) const override
+  {
+    if (pred == PRED_TYPE_mu || pred == PRED_TYPE_tu || pred == PRED_TYPE_tumu)
+    {
+      return true;
+    }
+  }
+
+  rtx expand (function_expander &e) const override
+  {
+    if (e.op_info->op == OP_TYPE_f_qf)
+    {
+      return e.use_exact_insn (
+	  code_for_pred_fnr_clip (ZERO_EXTEND, e.vector_mode ()));
+      gcc_unreachable ();
+    }
+  }
+};
+
 /* Implements vmseq/vmsne/vmslt/vmsgt/vmsle/vmsge.  */
 template<rtx_code CODE>
 class icmp : public function_base
@@ -2657,6 +2682,8 @@ static CONSTEXPR const sat_op<UNSPEC_VSSRL> vssrl_obj;
 static CONSTEXPR const sat_op<UNSPEC_VSSRA> vssra_obj;
 static CONSTEXPR const vnclip<UNSPEC_VNCLIP> vnclip_obj;
 static CONSTEXPR const vnclip<UNSPEC_VNCLIPU> vnclipu_obj;
+static CONSTEXPR const vfnrclip x_obj;
+static CONSTEXPR const vfnrclip xu_obj;
 static CONSTEXPR const mask_logic<AND> vmand_obj;
 static CONSTEXPR const mask_nlogic<AND> vmnand_obj;
 static CONSTEXPR const mask_notlogic<AND> vmandn_obj;
@@ -2991,6 +3018,8 @@ BASE (vssra)
 BASE (vssrl)
 BASE (vnclip)
 BASE (vnclipu)
+BASE (x)
+BASE (xu)
 BASE (vmand)
 BASE (vmnand)
 BASE (vmandn)

gcc/config/riscv/riscv-vector-builtins-bases.h

@@ -122,6 +122,8 @@ extern const function_base *const vssra;
 extern const function_base *const vssrl;
 extern const function_base *const vnclip;
 extern const function_base *const vnclipu;
+extern const function_base *const x;
+extern const function_base *const xu;
 extern const function_base *const vmand;
 extern const function_base *const vmnand;
 extern const function_base *const vmandn;

gcc/config/riscv/riscv-vector-builtins-shapes.cc

@@ -1320,6 +1320,43 @@ struct sf_vqmacc_def : public build_base
   }
 };
 
+/* sf_vfnrclip_def class. Handle instructions like vfnrclip.  */
+struct sf_vfnrclip_def : public build_base
+{
+  char *get_name (function_builder &b, const function_instance &instance,
+		  bool overloaded_p) const override
+  {
+    /* Return nullptr if it can not be overloaded.  */
+    if (overloaded_p && !instance.base->can_be_overloaded_p (instance.pred))
+      return nullptr;
+
+    b.append_name ("__riscv_sf_vfnrclip_");
+    printf("aaaaaa %s\n", instance.base_name);
+    b.append_name (instance.base_name);
+
+    if (!overloaded_p)
+      {
+	/* vop --> vop_<op>.  */
+	b.append_name (operand_suffixes[instance.op_info->op]);
+  /* vop_v --> vop_v_<type>.  */
+  b.append_name (type_suffixes[instance.type.index].vector);
+	/* vop_<op> --> vop_<op>_<type>. 
+	vector_type_index ret_type_idx
+	  = instance.op_info->ret.get_function_type_index (instance.type.index);
+	b.append_name (type_suffixes[ret_type_idx].vector); */
+      }
+
+    /* According to rvv-intrinsic-doc, it does not add "_m" suffix
+       for vop_m C++ overloaded API.*/  
+    if (overloaded_p && (instance.pred == PRED_TYPE_tu || instance.pred == PRED_TYPE_mu ||
+    instance.pred == PRED_TYPE_tumu))
+    {
+      b.append_name (predication_suffixes[instance.pred]);
+    }
+    return b.finish_name ();
+  }
+};
+
 SHAPE(vsetvl, vsetvl)
 SHAPE(vsetvl, vsetvlmax)
 SHAPE(loadstore, loadstore)
@@ -1355,4 +1392,5 @@ SHAPE(crypto_vv, crypto_vv)
 SHAPE(crypto_vi, crypto_vi)
 SHAPE(crypto_vv_no_op_type, crypto_vv_no_op_type)
 SHAPE(sf_vqmacc, sf_vqmacc)
+SHAPE(sf_vfnrclip, sf_vfnrclip)
 } // end namespace riscv_vector

gcc/config/riscv/riscv-vector-builtins-shapes.h

@@ -60,6 +60,7 @@ extern const function_shape *const crypto_vv;
 extern const function_shape *const crypto_vi;
 extern const function_shape *const crypto_vv_no_op_type;
 extern const function_shape *const sf_vqmacc;
+extern const function_shape *const sf_vfnrclip;
 }
 
 } // end namespace riscv_vector

gcc/config/riscv/riscv-vector-builtins.cc

@@ -711,6 +711,11 @@ static CONSTEXPR const rvv_arg_type_info shift_wv_args[]
      rvv_arg_type_info (RVV_BASE_double_trunc_unsigned_vector),
      rvv_arg_type_info_end};
 
+static CONSTEXPR const rvv_arg_type_info clip_args[]
+  = {rvv_arg_type_info (RVV_BASE_vector),
+     rvv_arg_type_info (RVV_BASE_double_trunc_unsigned_vector),
+     rvv_arg_type_info_end};
+
 /* A list of args for vector_type func (vector_type) function.  */
 static CONSTEXPR const rvv_arg_type_info v_args[]
   = {rvv_arg_type_info (RVV_BASE_vector), rvv_arg_type_info_end};
@@ -2521,6 +2526,22 @@ static CONSTEXPR const rvv_op_info i_narrow_shift_vwx_ops
      rvv_arg_type_info (RVV_BASE_double_trunc_vector), /* Return type */
      v_size_args /* Args */};
 
+/* A static operand information for double demote type func (vector_type,
+ * shift_type) function registration. */
+static CONSTEXPR const rvv_op_info u_clip_qf_ops
+  = {wextu_ops,					       /* Types */
+     OP_TYPE_f_qf,				       /* Suffix */
+     rvv_arg_type_info (RVV_BASE_double_trunc_unsigned_vector), /* Return type */
+     clip_args /* Args */};
+
+/* A static operand information for double demote type func (vector_type,
+ * shift_type) function registration. */
+static CONSTEXPR const rvv_op_info i_clip_qf_ops
+  = {wexti_ops,					       /* Types */
+     OP_TYPE_f_qf,				       /* Suffix */
+     rvv_arg_type_info (RVV_BASE_double_trunc_signed_vector), /* Return type */
+     clip_args /* Args */};
+
 /* A static operand information for double demote type func (vector_type,
  * size_t) function registration. */
 static CONSTEXPR const rvv_op_info u_narrow_shift_vwx_ops

gcc/config/riscv/riscv-vector-builtins.def

@@ -636,6 +636,7 @@ DEF_RVV_OP_TYPE (xu_w)
 DEF_RVV_OP_TYPE (s)
 DEF_RVV_OP_TYPE (4x8x4)
 DEF_RVV_OP_TYPE (2x8x2)
+DEF_RVV_OP_TYPE (f_qf)
 
 DEF_RVV_PRED_TYPE (ta)
 DEF_RVV_PRED_TYPE (tu)

gcc/config/riscv/riscv-vector-builtins.h

@@ -129,6 +129,7 @@ enum required_ext
   ZVFBFWMA_EXT,		/* Zvfbfwma extension */
   XSFVQMACCQOQ_EXT,	/* XSFVQMACCQOQ extension */
   XSFVQMACCDOD_EXT,	/* XSFVQMACCDOD extension */
+  XSFVFNRCLIPXFQF_EXT, /* XSFVFNRCLIPXFQF extension*/
   /* Please update below to isa_name func when add or remove enum type(s).  */
 };
 
@@ -166,6 +167,8 @@ static inline const char * required_ext_to_isa_name (enum required_ext required)
       return "xsfvqmaccqoq";
     case XSFVQMACCDOD_EXT:
       return "xsfvqmaccdod";
+    case XSFVFNRCLIPXFQF_EXT:
+      return "xsfvfnrclipxfqf";
     default:
       gcc_unreachable ();
   }
@@ -207,6 +210,8 @@ static inline bool required_extensions_specified (enum required_ext required)
       return TARGET_XSFVQMACCQOQ;
     case XSFVQMACCDOD_EXT:
       return TARGET_XSFVQMACCDOD;
+    case XSFVFNRCLIPXFQF_EXT:
+      return TARGET_XSFVFNRCLIPXFQF;
     default:
       gcc_unreachable ();
   }
@@ -351,6 +356,8 @@ struct function_group_info
 	return TARGET_XSFVQMACCQOQ;
       case XSFVQMACCDOD_EXT:
 	return TARGET_XSFVQMACCDOD;
+      case XSFVFNRCLIPXFQF_EXT:
+	return TARGET_XSFVFNRCLIPXFQF;
       default:
         gcc_unreachable ();
     }
@@ -570,6 +577,9 @@ class function_base
   /* Return true if intrinsics maybe require vxrm operand.  */
   virtual bool may_require_vxrm_p () const;
 
+/* Return true if intrinsics maybe require qfrm operand.  */
+  virtual bool may_require_qfrm_p () const;
+
   /* Return true if intrinsics maybe require frm operand.  */
   virtual bool may_require_frm_p () const;
 
@@ -846,6 +856,14 @@ function_base::may_require_vxrm_p () const
   return false;
 }
 
+/* We choose to return false by default since most of the intrinsics does
+   not need qfrm operand.  */
+inline bool
+function_base::may_require_qfrm_p () const
+{
+  return false;
+}
+
 /* Since most of intrinsics can be overloaded, we set it true by default.  */
 inline bool
 function_base::can_be_overloaded_p (enum predication_type_index) const

gcc/config/riscv/riscv.md

@@ -391,6 +391,7 @@
 ;; vsmul       vector single-width fractional multiply with rounding and saturation instructions
 ;; vsshift     vector single-width scaling shift instructions
 ;; vnclip      vector narrowing fixed-point clip instructions
+;; vsfclip     vector fp32 to int8 ranged clip instructions
 ;; 13. Vector floating-point instructions
 ;; vfalu       vector single-width floating-point add/subtract instructions
 ;; vfwalu      vector widening floating-point add/subtract instructions
@@ -487,7 +488,7 @@
    vlsegde,vssegte,vlsegds,vssegts,vlsegdux,vlsegdox,vssegtux,vssegtox,vlsegdff,
    vialu,viwalu,vext,vicalu,vshift,vnshift,vicmp,viminmax,
    vimul,vidiv,viwmul,vimuladd,vsfmuladd,viwmuladd,vimerge,vimov,
-   vsalu,vaalu,vsmul,vsshift,vnclip,
+   vsalu,vaalu,vsmul,vsshift,vnclip,vsfclip,
    vfalu,vfwalu,vfmul,vfdiv,vfwmul,vfmuladd,vfwmuladd,vfsqrt,vfrecp,
    vfcmp,vfminmax,vfsgnj,vfclass,vfmerge,vfmov,
    vfcvtitof,vfcvtftoi,vfwcvtitof,vfwcvtftoi,

gcc/config/riscv/sifive-vector-builtins-functions.def

@@ -16,4 +16,10 @@ DEF_RVV_FUNCTION (vqmaccsu, sf_vqmacc, none_tu_preds, i_su_qdvv_ops)
 DEF_RVV_FUNCTION (vqmaccus, sf_vqmacc, none_tu_preds, i_us_qdvv_ops)
 #undef REQUIRED_EXTENSIONS
 
+#define REQUIRED_EXTENSIONS XSFVFNRCLIPXFQF_EXT
+DEF_RVV_FUNCTION (xu, sf_vfnrclip, full_preds, u_clip_qf_ops)
+DEF_RVV_FUNCTION (x, sf_vfnrclip, full_preds, i_clip_qf_ops)
+
+#undef REQUIRED_EXTENSIONS
+
 #undef DEF_RVV_FUNCTION

gcc/config/riscv/sifive-vector.md

@@ -141,3 +141,50 @@
   "sf.vqmaccus.4x8x4\t%0,%3,%4"
   [(set_attr "type" "vsfmuladd")
    (set_attr "mode" "<MODE>")])
+
+;; CLIP
+(define_insn "@pred_fnr_clip<v_su><mode>"
+  [(set (match_operand:<V_DOUBLE_TRUNC> 0 "register_operand"           "=vd,vd, vr, vr,vd, vr,  &vr,  &vr, vd, vr,  &vr,  &vr")
+	(if_then_else:<V_DOUBLE_TRUNC>
+	  (unspec:<VM>
+	    [(match_operand:<VM> 1 "vector_mask_operand"               " vm,vm,Wc1,Wc1,vm,Wc1,vmWc1,vmWc1, vm,Wc1,vmWc1,vmWc1")
+	     (match_operand 5 "vector_length_operand"                  " rK,rK, rK, rK,rK, rK,   rK,   rK, rK, rK,   rK,   rK")
+	     (match_operand 6 "const_int_operand"                      "  i, i,  i,  i, i,  i,    i,    i,  i,  i,    i,    i")
+	     (match_operand 7 "const_int_operand"                      "  i, i,  i,  i, i,  i,    i,    i,  i,  i,    i,    i")
+	     (match_operand 8 "const_int_operand"                      "  i, i,  i,  i, i,  i,    i,    i,  i,  i,    i,    i")
+	     (match_operand 9 "const_int_operand"                      "  i, i,  i,  i, i,  i,    i,    i,  i,  i,    i,    i")
+	     (reg:SI VL_REGNUM)
+	     (reg:SI VTYPE_REGNUM)
+	     (reg:SI VXRM_REGNUM)] UNSPEC_VPREDICATE)
+	  (unspec:<V_DOUBLE_TRUNC>
+	    [(match_operand:VWEXTI 3 "register_operand"                " vr,vr, vr, vr, 0,  0,   vr,   vr,  0,  0,   vr,   vr")
+	     (match_operand:<V_DOUBLE_TRUNC> 4 "vector_shift_operand"  "  0, 0,  0,  0,vr, vr,   vr,   vr, vk, vk,   vk,   vk")] VNCLIP)
+	  (match_operand:<V_DOUBLE_TRUNC> 2 "vector_merge_operand"     "  0,vu,  0, vu,vu, vu,   vu,    0, vu, vu,   vu,    0")))]
+  "TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF"
+  "sf.vfnrclip.x.f.qf%o4\t%0,%3,%v4%p1"
+  [(set_attr "type" "vsfclip")
+   (set_attr "mode" "<V_DOUBLE_TRUNC>")
+   (set_attr "spec_restriction" "thv,thv,thv,thv,thv,thv,none,none,thv,thv,none,none")])
+
+(define_insn "@pred_fnr_clip<v_su><mode>_scalar"
+  [(set (match_operand:<V_DOUBLE_TRUNC> 0 "register_operand"           "=vd, vd, vr, vr,  &vr,  &vr")
+	(if_then_else:<V_DOUBLE_TRUNC>
+	  (unspec:<VM>
+	    [(match_operand:<VM> 1 "vector_mask_operand"               " vm, vm,Wc1,Wc1,vmWc1,vmWc1")
+	     (match_operand 5 "vector_length_operand"                  " rK, rK, rK, rK,   rK,   rK")
+	     (match_operand 6 "const_int_operand"                      "  i,  i,  i,  i,    i,    i")
+	     (match_operand 7 "const_int_operand"                      "  i,  i,  i,  i,    i,    i")
+	     (match_operand 8 "const_int_operand"                      "  i,  i,  i,  i,    i,    i")
+	     (match_operand 9 "const_int_operand"                      "  i,  i,  i,  i,    i,    i")
+	     (reg:SI VL_REGNUM)
+	     (reg:SI VTYPE_REGNUM)
+	     (reg:SI VXRM_REGNUM)] UNSPEC_VPREDICATE)
+	  (unspec:<V_DOUBLE_TRUNC>
+	    [(match_operand:VWEXTI 3 "register_operand"                "  0,  0,  0,  0,   vr,   vr")
+	     (match_operand 4 "pmode_reg_or_uimm5_operand"             " rK, rK, rK, rK,   rK,   rK")] VNCLIP)
+	  (match_operand:<V_DOUBLE_TRUNC> 2 "vector_merge_operand"     " vu,  0, vu,  0,   vu,    0")))]
+  "TARGET_VECTOR && TARGET_XSFVFNRCLIPXFQF"
+  "sf.vfnrclip.xu.f.qf%o4\t%0,%3,%4%p1"
+  [(set_attr "type" "vsfclip")
+   (set_attr "mode" "<V_DOUBLE_TRUNC>")
+   (set_attr "spec_restriction" "thv,thv,thv,thv,none,none")])