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mr-cmr-c
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DO NOT MERGE; arm neon: where is poly128_t available?
Confirmed: `vmull{,_high}_p64` requires `FEAT_PMULL`/`__ARM_FEATURE_AES` https://developer.arm.com/architectures/instruction-sets/intrinsics/#q=vmull_p64 uses the `1Q` destination register which requires the ARM NEON crypto extension /`FEAT_PMULL` as per: https://developer.arm.com/documentation/ddi0602/2025-06/SIMD-FP-Instructions/PMULL--PMULL2--Polynomial-multiply-long- https://arm-software.github.io/acle/main/acle.html#aes-extension confirms that `FEAT_PMULL` is signaled by `__ARM_FEATURE_AES`
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4 files changed

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-59
lines changed

4 files changed

+45
-59
lines changed

‎simde/arm/neon/ld1.h‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -660,15 +660,15 @@ simde_vld1q_p64(simde_poly64_t const ptr[HEDLEY_ARRAY_PARAM(2)]) {
660660
SIMDE_FUNCTION_ATTRIBUTES
661661
simde_poly128_t
662662
simde_vldrq_p128(simde_poly128_t const ptr[HEDLEY_ARRAY_PARAM(1)]) {
663-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
663+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
664664
return vldrq_p128(ptr);
665665
#else
666666
simde_poly128_t r_;
667667
simde_memcpy(&r_, ptr, sizeof(r_));
668668
return r_;
669669
#endif
670670
}
671-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && !defined(SIMDE_ARCH_ARM_CRYPTO))
671+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
672672
#undef vldrq_p128
673673
#define vldrq_p128(a) simde_vldrq_p128((a))
674674
#endif

‎simde/arm/neon/reinterpret.h‎

Lines changed: 40 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -6230,7 +6230,7 @@ simde_vreinterpretq_p64_u64(simde_uint64x2_t a) {
62306230
SIMDE_FUNCTION_ATTRIBUTES
62316231
simde_poly128_t
62326232
simde_vreinterpretq_p128_s8(simde_int8x16_t a) {
6233-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6233+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
62346234
return vreinterpretq_p128_s8(a);
62356235
#else
62366236
simde_poly128_t r_;
@@ -6247,7 +6247,7 @@ simde_vreinterpretq_p128_s8(simde_int8x16_t a) {
62476247
SIMDE_FUNCTION_ATTRIBUTES
62486248
simde_poly128_t
62496249
simde_vreinterpretq_p128_s16(simde_int16x8_t a) {
6250-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6250+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
62516251
return vreinterpretq_p128_s16(a);
62526252
#else
62536253
simde_poly128_t r_;
@@ -6264,7 +6264,7 @@ simde_vreinterpretq_p128_s16(simde_int16x8_t a) {
62646264
SIMDE_FUNCTION_ATTRIBUTES
62656265
simde_poly128_t
62666266
simde_vreinterpretq_p128_s32(simde_int32x4_t a) {
6267-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6267+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
62686268
return vreinterpretq_p128_s32(a);
62696269
#else
62706270
simde_poly128_t r_;
@@ -6281,7 +6281,7 @@ simde_vreinterpretq_p128_s32(simde_int32x4_t a) {
62816281
SIMDE_FUNCTION_ATTRIBUTES
62826282
simde_poly128_t
62836283
simde_vreinterpretq_p128_s64(simde_int64x2_t a) {
6284-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6284+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
62856285
return vreinterpretq_p128_s64(a);
62866286
#else
62876287
simde_poly128_t r_;
@@ -6298,7 +6298,7 @@ simde_vreinterpretq_p128_s64(simde_int64x2_t a) {
62986298
SIMDE_FUNCTION_ATTRIBUTES
62996299
simde_poly128_t
63006300
simde_vreinterpretq_p128_u8(simde_uint8x16_t a) {
6301-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6301+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
63026302
return vreinterpretq_p128_u8(a);
63036303
#else
63046304
simde_poly128_t r_;
@@ -6315,7 +6315,7 @@ simde_vreinterpretq_p128_u8(simde_uint8x16_t a) {
63156315
SIMDE_FUNCTION_ATTRIBUTES
63166316
simde_poly128_t
63176317
simde_vreinterpretq_p128_u16(simde_uint16x8_t a) {
6318-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6318+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
63196319
return vreinterpretq_p128_u16(a);
63206320
#else
63216321
simde_poly128_t r_;
@@ -6332,7 +6332,7 @@ simde_vreinterpretq_p128_u16(simde_uint16x8_t a) {
63326332
SIMDE_FUNCTION_ATTRIBUTES
63336333
simde_poly128_t
63346334
simde_vreinterpretq_p128_u32(simde_uint32x4_t a) {
6335-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6335+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
63366336
return vreinterpretq_p128_u32(a);
63376337
#else
63386338
simde_poly128_t r_;
@@ -6349,7 +6349,7 @@ simde_vreinterpretq_p128_u32(simde_uint32x4_t a) {
63496349
SIMDE_FUNCTION_ATTRIBUTES
63506350
simde_poly128_t
63516351
simde_vreinterpretq_p128_u64(simde_uint64x2_t a) {
6352-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6352+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
63536353
return vreinterpretq_p128_u64(a);
63546354
#else
63556355
simde_poly128_t r_;
@@ -6366,7 +6366,7 @@ simde_vreinterpretq_p128_u64(simde_uint64x2_t a) {
63666366
SIMDE_FUNCTION_ATTRIBUTES
63676367
simde_poly128_t
63686368
simde_vreinterpretq_p128_p8(simde_poly8x16_t a) {
6369-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6369+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
63706370
return vreinterpretq_p128_p8(a);
63716371
#else
63726372
simde_poly128_t r_;
@@ -6383,7 +6383,7 @@ simde_vreinterpretq_p128_p8(simde_poly8x16_t a) {
63836383
SIMDE_FUNCTION_ATTRIBUTES
63846384
simde_poly128_t
63856385
simde_vreinterpretq_p128_p16(simde_poly16x8_t a) {
6386-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6386+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
63876387
return vreinterpretq_p128_p16(a);
63886388
#else
63896389
simde_poly128_t r_;
@@ -6400,7 +6400,7 @@ simde_vreinterpretq_p128_p16(simde_poly16x8_t a) {
64006400
SIMDE_FUNCTION_ATTRIBUTES
64016401
simde_poly128_t
64026402
simde_vreinterpretq_p128_f16(simde_float16x8_t a) {
6403-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_CRYPTO)
6403+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
64046404
return vreinterpretq_p128_f16(a);
64056405
#else
64066406
simde_poly128_t r_;
@@ -6410,15 +6410,15 @@ simde_vreinterpretq_p128_f16(simde_float16x8_t a) {
64106410
#endif
64116411
}
64126412
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6413-
!(defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_CRYPTO)))
6413+
!(defined(SIMDE_ARM_NEON_FP16)))
64146414
#undef vreinterpretq_p128_f16
64156415
#define vreinterpretq_p128_f16(a) simde_vreinterpretq_p128_f16(a)
64166416
#endif
64176417

64186418
SIMDE_FUNCTION_ATTRIBUTES
64196419
simde_poly128_t
64206420
simde_vreinterpretq_p128_f32(simde_float32x4_t a) {
6421-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6421+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
64226422
return vreinterpretq_p128_f32(a);
64236423
#else
64246424
simde_poly128_t r_;
@@ -6427,16 +6427,15 @@ simde_vreinterpretq_p128_f32(simde_float32x4_t a) {
64276427
return r_;
64286428
#endif
64296429
}
6430-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6431-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6430+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
64326431
#undef vreinterpretq_p128_f32
64336432
#define vreinterpretq_p128_f32(a) simde_vreinterpretq_p128_f32(a)
64346433
#endif
64356434

64366435
SIMDE_FUNCTION_ATTRIBUTES
64376436
simde_poly128_t
64386437
simde_vreinterpretq_p128_f64(simde_float64x2_t a) {
6439-
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6438+
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
64406439
return vreinterpretq_p128_f64(a);
64416440
#else
64426441
simde_poly128_t r_;
@@ -6445,16 +6444,15 @@ simde_vreinterpretq_p128_f64(simde_float64x2_t a) {
64456444
return r_;
64466445
#endif
64476446
}
6448-
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6449-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6447+
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
64506448
#undef vreinterpretq_p128_f64
64516449
#define vreinterpretq_p128_f64(a) simde_vreinterpretq_p128_f64(a)
64526450
#endif
64536451

64546452
SIMDE_FUNCTION_ATTRIBUTES
64556453
simde_int8x16_t
64566454
simde_vreinterpretq_s8_p128(simde_poly128_t a) {
6457-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6455+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
64586456
return vreinterpretq_s8_p128(a);
64596457
#else
64606458
simde_int8x16_private r_;
@@ -6463,16 +6461,15 @@ simde_vreinterpretq_s8_p128(simde_poly128_t a) {
64636461
return simde_int8x16_from_private(r_);
64646462
#endif
64656463
}
6466-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6467-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6464+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
64686465
#undef vreinterpretq_s8_p128
64696466
#define vreinterpretq_s8_p128(a) simde_vreinterpretq_s8_p128(a)
64706467
#endif
64716468

64726469
SIMDE_FUNCTION_ATTRIBUTES
64736470
simde_int16x8_t
64746471
simde_vreinterpretq_s16_p128(simde_poly128_t a) {
6475-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6472+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
64766473
return vreinterpretq_s16_p128(a);
64776474
#else
64786475
simde_int16x8_private r_;
@@ -6481,16 +6478,15 @@ simde_vreinterpretq_s16_p128(simde_poly128_t a) {
64816478
return simde_int16x8_from_private(r_);
64826479
#endif
64836480
}
6484-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6485-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6481+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
64866482
#undef vreinterpretq_s16_p128
64876483
#define vreinterpretq_s16_p128(a) simde_vreinterpretq_s16_p128(a)
64886484
#endif
64896485

64906486
SIMDE_FUNCTION_ATTRIBUTES
64916487
simde_int32x4_t
64926488
simde_vreinterpretq_s32_p128(simde_poly128_t a) {
6493-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6489+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
64946490
return vreinterpretq_s32_p128(a);
64956491
#else
64966492
simde_int32x4_private r_;
@@ -6499,16 +6495,15 @@ simde_vreinterpretq_s32_p128(simde_poly128_t a) {
64996495
return simde_int32x4_from_private(r_);
65006496
#endif
65016497
}
6502-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6503-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6498+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
65046499
#undef vreinterpretq_s32_p128
65056500
#define vreinterpretq_s32_p128(a) simde_vreinterpretq_s32_p128(a)
65066501
#endif
65076502

65086503
SIMDE_FUNCTION_ATTRIBUTES
65096504
simde_int64x2_t
65106505
simde_vreinterpretq_s64_p128(simde_poly128_t a) {
6511-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6506+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
65126507
return vreinterpretq_s64_p128(a);
65136508
#else
65146509
simde_int64x2_private r_;
@@ -6517,16 +6512,15 @@ simde_vreinterpretq_s64_p128(simde_poly128_t a) {
65176512
return simde_int64x2_from_private(r_);
65186513
#endif
65196514
}
6520-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6521-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6515+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
65226516
#undef vreinterpretq_s64_p128
65236517
#define vreinterpretq_s64_p128(a) simde_vreinterpretq_s64_p128(a)
65246518
#endif
65256519

65266520
SIMDE_FUNCTION_ATTRIBUTES
65276521
simde_uint8x16_t
65286522
simde_vreinterpretq_u8_p128(simde_poly128_t a) {
6529-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6523+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
65306524
return vreinterpretq_u8_p128(a);
65316525
#else
65326526
simde_uint8x16_private r_;
@@ -6535,16 +6529,15 @@ simde_vreinterpretq_u8_p128(simde_poly128_t a) {
65356529
return simde_uint8x16_from_private(r_);
65366530
#endif
65376531
}
6538-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6539-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6532+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
65406533
#undef vreinterpretq_u8_p128
65416534
#define vreinterpretq_u8_p128(a) simde_vreinterpretq_u8_p128(a)
65426535
#endif
65436536

65446537
SIMDE_FUNCTION_ATTRIBUTES
65456538
simde_uint16x8_t
65466539
simde_vreinterpretq_u16_p128(simde_poly128_t a) {
6547-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6540+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
65486541
return vreinterpretq_u16_p128(a);
65496542
#else
65506543
simde_uint16x8_private r_;
@@ -6553,16 +6546,15 @@ simde_vreinterpretq_u16_p128(simde_poly128_t a) {
65536546
return simde_uint16x8_from_private(r_);
65546547
#endif
65556548
}
6556-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6557-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6549+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
65586550
#undef vreinterpretq_u16_p128
65596551
#define vreinterpretq_u16_p128(a) simde_vreinterpretq_u16_p128(a)
65606552
#endif
65616553

65626554
SIMDE_FUNCTION_ATTRIBUTES
65636555
simde_uint32x4_t
65646556
simde_vreinterpretq_u32_p128(simde_poly128_t a) {
6565-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6557+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
65666558
return vreinterpretq_u32_p128(a);
65676559
#else
65686560
simde_uint32x4_private r_;
@@ -6571,16 +6563,15 @@ simde_vreinterpretq_u32_p128(simde_poly128_t a) {
65716563
return simde_uint32x4_from_private(r_);
65726564
#endif
65736565
}
6574-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6575-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6566+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
65766567
#undef vreinterpretq_u32_p128
65776568
#define vreinterpretq_u32_p128(a) simde_vreinterpretq_u32_p128(a)
65786569
#endif
65796570

65806571
SIMDE_FUNCTION_ATTRIBUTES
65816572
simde_uint64x2_t
65826573
simde_vreinterpretq_u64_p128(simde_poly128_t a) {
6583-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6574+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
65846575
return vreinterpretq_u64_p128(a);
65856576
#else
65866577
simde_uint64x2_private r_;
@@ -6589,16 +6580,15 @@ simde_vreinterpretq_u64_p128(simde_poly128_t a) {
65896580
return simde_uint64x2_from_private(r_);
65906581
#endif
65916582
}
6592-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6593-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6583+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
65946584
#undef vreinterpretq_u64_p128
65956585
#define vreinterpretq_u64_p128(a) simde_vreinterpretq_u64_p128(a)
65966586
#endif
65976587

65986588
SIMDE_FUNCTION_ATTRIBUTES
65996589
simde_poly8x16_t
66006590
simde_vreinterpretq_p8_p128(simde_poly128_t a) {
6601-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6591+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
66026592
return vreinterpretq_p8_p128(a);
66036593
#else
66046594
simde_poly8x16_private r_;
@@ -6607,16 +6597,15 @@ simde_vreinterpretq_p8_p128(simde_poly128_t a) {
66076597
return simde_poly8x16_from_private(r_);
66086598
#endif
66096599
}
6610-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6611-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6600+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
66126601
#undef vreinterpretq_p8_p128
66136602
#define vreinterpretq_p8_p128(a) simde_vreinterpretq_p8_p128(a)
66146603
#endif
66156604

66166605
SIMDE_FUNCTION_ATTRIBUTES
66176606
simde_poly16x8_t
66186607
simde_vreinterpretq_p16_p128(simde_poly128_t a) {
6619-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6608+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE)
66206609
return vreinterpretq_p16_p128(a);
66216610
#else
66226611
simde_poly16x8_private r_;
@@ -6625,16 +6614,15 @@ simde_vreinterpretq_p16_p128(simde_poly128_t a) {
66256614
return simde_poly16x8_from_private(r_);
66266615
#endif
66276616
}
6628-
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6629-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6617+
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES)
66306618
#undef vreinterpretq_p16_p128
66316619
#define vreinterpretq_p16_p128(a) simde_vreinterpretq_p16_p128(a)
66326620
#endif
66336621

66346622
SIMDE_FUNCTION_ATTRIBUTES
66356623
simde_float16x8_t
66366624
simde_vreinterpretq_f16_p128(simde_poly128_t a) {
6637-
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_CRYPTO)
6625+
#if defined(SIMDE_ARM_NEON_A32V8_NATIVE) && defined(SIMDE_ARM_NEON_FP16)
66386626
return vreinterpretq_f16_p128(a);
66396627
#else
66406628
simde_float16x8_private r_;
@@ -6644,15 +6632,15 @@ simde_vreinterpretq_f16_p128(simde_poly128_t a) {
66446632
#endif
66456633
}
66466634
#if defined(SIMDE_ARM_NEON_A32V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6647-
!(defined(SIMDE_ARM_NEON_FP16) && defined(SIMDE_ARCH_ARM_CRYPTO)))
6635+
!(defined(SIMDE_ARM_NEON_FP16)))
66486636
#undef vreinterpretq_f16_p128
66496637
#define vreinterpretq_f16_p128(a) simde_vreinterpretq_f16_p128(a)
66506638
#endif
66516639

66526640
SIMDE_FUNCTION_ATTRIBUTES
66536641
simde_float64x2_t
66546642
simde_vreinterpretq_f64_p128(simde_poly128_t a) {
6655-
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE) && defined(SIMDE_ARCH_ARM_CRYPTO)
6643+
#if defined(SIMDE_ARM_NEON_A64V8_NATIVE)
66566644
return vreinterpretq_f64_p128(a);
66576645
#else
66586646
simde_float64x2_private r_;
@@ -6661,8 +6649,7 @@ simde_vreinterpretq_f64_p128(simde_poly128_t a) {
66616649
return simde_float64x2_from_private(r_);
66626650
#endif
66636651
}
6664-
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES) || (defined(SIMDE_ENABLE_NATIVE_ALIASES) && \
6665-
!(defined(SIMDE_ARCH_ARM_CRYPTO)))
6652+
#if defined(SIMDE_ARM_NEON_A64V8_ENABLE_NATIVE_ALIASES)
66666653
#undef vreinterpretq_f64_p128
66676654
#define vreinterpretq_f64_p128(a) simde_vreinterpretq_f64_p128(a)
66686655
#endif

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