@@ -43,7 +43,7 @@ simde_mm_mask_compressstoreu_pd (void* base_addr, simde__mmask8 k, simde__m128d
4343 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
4444 _mm_mask_compressstoreu_pd (base_addr , k , a );
4545 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
46- simde__mmask8 store_mask = _pext_u32 (-1 , k );
46+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
4747 _mm_mask_storeu_pd (base_addr , store_mask , _mm_maskz_compress_pd (k , a ));
4848 #else
4949 simde__m128d_private
@@ -132,7 +132,7 @@ simde_mm_mask_compressstoreu_ps (void* base_addr, simde__mmask8 k, simde__m128 a
132132 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
133133 _mm_mask_compressstoreu_ps (base_addr , k , a );
134134 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
135- simde__mmask8 store_mask = _pext_u32 (-1 , k );
135+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
136136 _mm_mask_storeu_ps (base_addr , store_mask , _mm_maskz_compress_ps (k , a ));
137137 #else
138138 simde__m128_private
@@ -221,7 +221,7 @@ simde_mm_mask_compressstoreu_epi32 (void* base_addr, simde__mmask8 k, simde__m12
221221 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
222222 _mm_mask_compressstoreu_epi32 (base_addr , k , a );
223223 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
224- simde__mmask8 store_mask = _pext_u32 (-1 , k );
224+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
225225 _mm_mask_storeu_epi32 (base_addr , store_mask , _mm_maskz_compress_epi32 (k , a ));
226226 #else
227227 simde__m128i_private
@@ -310,7 +310,7 @@ simde_mm_mask_compressstoreu_epi64 (void* base_addr, simde__mmask8 k, simde__m12
310310 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
311311 _mm_mask_compressstoreu_epi64 (base_addr , k , a );
312312 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
313- simde__mmask8 store_mask = _pext_u32 (-1 , k );
313+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
314314 _mm_mask_storeu_epi64 (base_addr , store_mask , _mm_maskz_compress_epi64 (k , a ));
315315 #else
316316 simde__m128i_private
@@ -399,7 +399,7 @@ simde_mm256_mask_compressstoreu_pd (void* base_addr, simde__mmask8 k, simde__m25
399399 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
400400 _mm256_mask_compressstoreu_pd (base_addr , k , a );
401401 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
402- simde__mmask8 store_mask = _pext_u32 (-1 , k );
402+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
403403 _mm256_mask_storeu_pd (base_addr , store_mask , _mm256_maskz_compress_pd (k , a ));
404404 #else
405405 simde__m256d_private
@@ -488,7 +488,7 @@ simde_mm256_mask_compressstoreu_ps (void* base_addr, simde__mmask8 k, simde__m25
488488 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
489489 _mm256_mask_compressstoreu_ps (base_addr , k , a );
490490 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
491- simde__mmask8 store_mask = _pext_u32 (-1 , k );
491+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
492492 _mm256_mask_storeu_ps (base_addr , store_mask , _mm256_maskz_compress_ps (k , a ));
493493 #else
494494 simde__m256_private
@@ -577,7 +577,7 @@ simde_mm256_mask_compressstoreu_epi32 (void* base_addr, simde__mmask8 k, simde__
577577 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
578578 _mm256_mask_compressstoreu_epi32 (base_addr , k , a );
579579 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
580- simde__mmask8 store_mask = _pext_u32 (-1 , k );
580+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
581581 _mm256_mask_storeu_epi32 (base_addr , store_mask , _mm256_maskz_compress_epi32 (k , a ));
582582 #else
583583 simde__m256i_private
@@ -666,7 +666,7 @@ simde_mm256_mask_compressstoreu_epi64 (void* base_addr, simde__mmask8 k, simde__
666666 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
667667 _mm256_mask_compressstoreu_epi64 (base_addr , k , a );
668668 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
669- simde__mmask8 store_mask = _pext_u32 (-1 , k );
669+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
670670 _mm256_mask_storeu_epi64 (base_addr , store_mask , _mm256_maskz_compress_epi64 (k , a ));
671671 #else
672672 simde__m256i_private
@@ -755,7 +755,7 @@ simde_mm512_mask_compressstoreu_pd (void* base_addr, simde__mmask8 k, simde__m51
755755 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
756756 _mm512_mask_compressstoreu_pd (base_addr , k , a );
757757 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
758- simde__mmask8 store_mask = _pext_u32 (-1 , k );
758+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
759759 _mm512_mask_storeu_pd (base_addr , store_mask , _mm512_maskz_compress_pd (k , a ));
760760 #else
761761 simde__m512d_private
@@ -844,7 +844,7 @@ simde_mm512_mask_compressstoreu_ps (void* base_addr, simde__mmask16 k, simde__m5
844844 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
845845 _mm512_mask_compressstoreu_ps (base_addr , k , a );
846846 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
847- simde__mmask16 store_mask = _pext_u32 (-1 , k );
847+ simde__mmask16 store_mask = HEDLEY_STATIC_CAST ( simde__mmask16 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
848848 _mm512_mask_storeu_ps (base_addr , store_mask , _mm512_maskz_compress_ps (k , a ));
849849 #else
850850 simde__m512_private
@@ -933,7 +933,7 @@ simde_mm512_mask_compressstoreu_epi16 (void* base_addr, simde__mmask32 k, simde_
933933 #if defined(SIMDE_X86_AVX512VBMI2_NATIVE ) && !defined(__znver4__ )
934934 _mm512_mask_compressstoreu_epi16 (base_addr , k , a );
935935 #elif defined(SIMDE_X86_AVX512VBMI2_NATIVE ) && defined(__znver4__ )
936- simde__mmask32 store_mask = _pext_u32 (-1 , k );
936+ simde__mmask32 store_mask = _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k );
937937 _mm512_mask_storeu_epi16 (base_addr , store_mask , _mm512_maskz_compress_epi16 (k , a ));
938938 #else
939939 simde__m512i_private
@@ -963,7 +963,7 @@ simde_mm512_mask_compressstoreu_epi32 (void* base_addr, simde__mmask16 k, simde_
963963 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
964964 _mm512_mask_compressstoreu_epi32 (base_addr , k , a );
965965 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
966- simde__mmask16 store_mask = _pext_u32 (-1 , k );
966+ simde__mmask16 store_mask = HEDLEY_STATIC_CAST ( simde__mmask16 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
967967 _mm512_mask_storeu_epi32 (base_addr , store_mask , _mm512_maskz_compress_epi32 (k , a ));
968968 #else
969969 simde__m512i_private
@@ -1052,7 +1052,7 @@ simde_mm512_mask_compressstoreu_epi64 (void* base_addr, simde__mmask8 k, simde__
10521052 #if defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && !defined(__znver4__ )
10531053 _mm512_mask_compressstoreu_epi64 (base_addr , k , a );
10541054 #elif defined(SIMDE_X86_AVX512VL_NATIVE ) && defined(SIMDE_X86_AVX512F_NATIVE ) && defined(__znver4__ )
1055- simde__mmask8 store_mask = _pext_u32 (-1 , k );
1055+ simde__mmask8 store_mask = HEDLEY_STATIC_CAST ( simde__mmask8 , _pext_u32 (HEDLEY_STATIC_CAST ( unsigned int , -1 ) , k ) );
10561056 _mm512_mask_storeu_epi64 (base_addr , store_mask , _mm512_maskz_compress_epi64 (k , a ));
10571057 #else
10581058 simde__m512i_private
0 commit comments