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.devcontainer/Dockerfile

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ARG VARIANT=ubuntu-22.04
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FROM mcr.microsoft.com/vscode/devcontainers/base:${VARIANT}
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ENV DEBIAN_FRONTEND=noninteractive
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ENV PDK_ROOT=~/ttsetup/pdk
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ENV PDK=sky130A
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RUN apt update
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RUN apt install -y iverilog python3 python3-pip python3-venv python3-tk python-is-python3 libcairo2 verilator libpng-dev libqhull-dev
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# Clone tt-support-tools
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RUN mkdir -p /ttsetup
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RUN git clone -b tt09 https://github.com/TinyTapeout/tt-support-tools /ttsetup/tt-support-tools
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COPY test/requirements.txt /ttsetup/test_requirements.txt
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COPY .devcontainer/copy_tt_support_tools.sh /ttsetup
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RUN pip3 install -r /ttsetup/test_requirements.txt -r /ttsetup/tt-support-tools/requirements.txt
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# Install verible (for formatting)
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RUN umask 022 && \
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curl -L https://github.com/chipsalliance/verible/releases/download/v0.0-3795-gf4d72375/verible-v0.0-3795-gf4d72375-linux-static-x86_64.tar.gz | \
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tar zxf - -C /usr/local --strip-components=1 && \
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chmod 755 /usr/local/bin
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# Install openlane
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RUN pip3 install openlane==2.1.5
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#! /bin/sh
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if [ ! -L tt ]; then
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cp -R /ttsetup/tt-support-tools tt
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cd tt && git pull && cd ..
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fi

.devcontainer/devcontainer.json

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// For format details, see https://aka.ms/devcontainer.json. For config options, see the README at:
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// https://github.com/microsoft/vscode-dev-containers/tree/v0.183.0/containers/ubuntu
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{
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"name": "Tiny Tapeout Dev Container",
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"build": {
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"dockerfile": "Dockerfile",
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"context": ".."
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},
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"runArgs": [
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"--memory=10GB"
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],
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"customizations": {
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"vscode": {
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"settings": {
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"terminal.integrated.defaultProfile.linux": "bash"
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},
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"extensions": ["mshr-h.veriloghdl", "surfer-project.surfer"]
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}
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},
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"features": {
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"ghcr.io/devcontainers/features/docker-in-docker:2": {
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"moby": true,
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"azureDnsAutoDetection": true,
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"version": "latest",
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"dockerDashComposeVersion": "none"
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}
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},
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"postStartCommand": "/ttsetup/copy_tt_support_tools.sh"
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}

.github/workflows/docs.yaml

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name: docs
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on:
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push:
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workflow_dispatch:
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jobs:
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docs:
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runs-on: ubuntu-24.04
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steps:
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- name: Checkout repo
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uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: Build docs
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uses: TinyTapeout/tt-gds-action/docs@tt09

.github/workflows/fpga.yaml

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name: fpga
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on:
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push:
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# Comment out (or remove) the following line to run the FPGA workflow on every push:
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branches: none
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workflow_dispatch:
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jobs:
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fpga:
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runs-on: ubuntu-24.04
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steps:
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- name: checkout repo
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uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: FPGA bitstream for TT ASIC Sim (ICE40UP5K)
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uses: TinyTapeout/tt-gds-action/fpga/ice40up5k@tt09

.github/workflows/gds.yaml

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name: gds
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on:
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push:
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workflow_dispatch:
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jobs:
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gds:
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runs-on: ubuntu-24.04
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steps:
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- name: checkout repo
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uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: Build GDS
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uses: TinyTapeout/tt-gds-action/orfs@tt09
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#precheck:
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# needs: gds
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# runs-on: ubuntu-24.04
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# steps:
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# - name: Run Tiny Tapeout Precheck
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# uses: TinyTapeout/tt-gds-action/precheck@tt09
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gl_test:
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needs: gds
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runs-on: ubuntu-24.04
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env:
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PDK_ROOT: ${{ github.workspace }}/IHP-Open-PDK
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TEST_DIR: ${{ github.workspace }}/test
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steps:
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- name: checkout repo
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uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: Download GDS artifact
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uses: actions/download-artifact@v4
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with:
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name: tt_submission
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- name: install PDK
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uses: actions/checkout@v4
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with:
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repository: tinytapeout/IHP-Open-PDK
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ref: tt
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path: IHP-Open-PDK
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- name: Setup python
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uses: actions/setup-python@v5
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with:
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python-version: '3.11'
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- name: Install Python packages
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shell: bash
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run: pip install -r test/requirements.txt
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- name: ccache
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uses: hendrikmuhs/[email protected]
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- name: Install iverilog
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shell: bash
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run: |
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wget https://github.com/htfab/iverilog/releases/download/13.0-git-d8c3c51/iverilog_13.0-git-d8c3c51a-1_amd64.deb
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sudo apt-get update -y
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sudo apt-get install -y ./iverilog_13.0-git-d8c3c51a-1_amd64.deb
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- name: Run tests
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shell: bash
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run: |
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cp tt_submission/*.v "$TEST_DIR/gate_level_netlist.v"
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cd "$TEST_DIR"
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rm -f tb.vcd results.xml
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make clean
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GATES=yes make
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# `make` will return success even if the tests fail, so check for failure in results.xml
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test -f results.xml
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! grep failure results.xml
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- name: Upload VCD
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if: always()
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uses: actions/upload-artifact@v4
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with:
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name: gatelevel_test_vcd
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path: |
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${{ env.TEST_DIR }}/tb.vcd
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${{ env.TEST_DIR }}/results.xml
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- name: Test Summary
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if: always()
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uses: test-summary/[email protected]
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with:
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paths: ${{ env.TEST_DIR }}/results.xml
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viewer:
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needs: gds
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runs-on: ubuntu-24.04
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permissions:
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pages: write # to deploy to Pages
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id-token: write # to verify the deployment originates from an appropriate source
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steps:
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- uses: TinyTapeout/tt-gds-action/viewer@tt09

.github/workflows/test.yaml

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name: test
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on: [push, workflow_dispatch]
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jobs:
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test:
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runs-on: ubuntu-24.04
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steps:
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- name: Checkout repo
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uses: actions/checkout@v4
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with:
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submodules: recursive
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- name: Install iverilog
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shell: bash
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run: sudo apt-get update && sudo apt-get install -y iverilog
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# Set Python up and install cocotb
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- name: Setup python
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uses: actions/setup-python@v5
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with:
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python-version: '3.11'
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- name: Install Python packages
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shell: bash
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run: pip install -r test/requirements.txt
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- name: Run tests
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run: |
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cd test
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make clean
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make
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# make will return success even if the test fails, so check for failure in the results.xml
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! grep failure results.xml
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- name: Test Summary
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uses: test-summary/[email protected]
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with:
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paths: "test/results.xml"
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if: always()
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- name: upload vcd
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if: success() || failure()
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uses: actions/upload-artifact@v4
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with:
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name: test-vcd
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path: |
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test/tb.vcd
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test/results.xml

.gitignore

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.DS_Store
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.idea
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*.vcd
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runs
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tt_submission
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src/user_config.json
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src/config_merged.json
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test/sim_build
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test/__pycache__/
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test/results.xml
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test/gate_level_netlist.v

.vscode/extensions.json

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{
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"recommendations": [
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"mshr-h.veriloghdl",
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"surfer-project.surfer"
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]
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}

.vscode/settings.json

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{
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"verilog.linting.linter": "verilator",
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"verilog.formatting.verilogHDL.formatter": "verible-verilog-format"
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}

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