first working version of a PIO to DMA setup without CPU calls. Transmitting 64bits per samples, in a ring buffer from witch the CPU can take the last samples.

thomasfla · thomasfla · commit cc97db0503c7 · 2025-09-02T18:19:20.000+02:00
diff --git a/src/current/rp2350/RP2350PIOCurrentSense.cpp b/src/current/rp2350/RP2350PIOCurrentSense.cpp
@@ -11,7 +11,6 @@
         this->gain_b = gain;
         this->gain_c = gain;
         this->max_adc_value = max_adc_value;
-
     };
 
 
@@ -24,17 +23,16 @@
         // TODO check that driver is linked
         
         // Done init PIO        
-        // TODO init ADC via SPI
-        // TODO init DMA to transfer ADC data to memory buffer
+        // TODO init ADC via SPI (Only for ADC with MOSI input)
+        // Done init DMA to transfer ADC data to memory buffer
         // TODO init timer to trigger PIO conversions at required frequency (check driver settings)
         //      TDB: do we need config input to know which timer slice and channel to use? or can we pick automatically?
         // TODO start everything up
 
-        
         float sck_hz = 20e6;
         PIO pio = pio0; 
-        int sm = pio_claim_unused_sm(pio0, false);
-        if (sm < 0) { pio = pio1; sm = pio_claim_unused_sm(pio1, true); }
+        int sm = pio_claim_unused_sm(pio0, true);
+        //if (sm < 0) { pio = pio1; sm = pio_claim_unused_sm(pio1, true); } //For now, let say we have to use PIO0, this is simpler for quick DMA setup
 
         // --- patch program instructions with chosen trigger pin ---
         size_t prog_len = bu79100g_parallel3_program.length;
@@ -65,17 +63,56 @@
         pio_sm_set_consecutive_pindirs(pio, sm, this->pinCSB, 1, true);   // CS out
         pio_sm_set_consecutive_pindirs(pio, sm, this->pinD0,  3, false);  // D0..D2 in
 
-        // Shift config: right, autopush every 24 bits (two pushes per conversion)
-        sm_config_set_in_shift(&c, true, true, 24);
+        // Shift config: right, autopush every 32 bits (two pushes per conversion)
+        sm_config_set_in_shift(&c, true, true, 32);
 
         // SCK ≈ clk_sys / (2 * clkdiv) because each SCK period = 2 instructions
         float div = (float)clock_get_hz(clk_sys) / (2.0f * sck_hz);
         sm_config_set_clkdiv(&c, div);
 
-        // Init & start the SM
+        // Init the SM
         pio_sm_init(pio, sm, off, &c);
+
+       //DMA Setup
+       //dma_a is set to read from PIO RX FIFO and write to 'buff' buffer memory
+        dma_a = dma_claim_unused_channel(true);
+        dma_b = dma_claim_unused_channel(true);
+        // ---------------------- DMA A: PIO RX FIFO -> buff[] with WRITE ring ----------------------
+        dma_channel_config ca = dma_channel_get_default_config(dma_a);
+        channel_config_set_read_increment(&ca, false);
+        channel_config_set_write_increment(&ca, true);
+        channel_config_set_transfer_data_size(&ca, DMA_SIZE_32);
+        channel_config_set_dreq(&ca, DREQ_PIO0_RX0 + sm);
+        channel_config_set_chain_to(&ca, dma_b);  // A -> B when count hits 0
+
+        // Enable WRITE-side ring over the whole buffer span (power-of-two bytes)
+        // size_bits = log2(RING_BYTES)
+        channel_config_set_ring(&ca, /*write=*/true, /*size_bits=*/__builtin_ctz(RING_BYTES));
+
+        dma_channel_set_config(dma_a, &ca, false);
+        dma_channel_set_read_addr(dma_a, &pio->rxf[sm], false);
+        dma_channel_set_write_addr(dma_a, (void*)buff, false);
+        dma_channel_set_trans_count(dma_a, RING_WORDS, false);
+
+        // ---------------------- DMA B: rearm A with ONE 32-bit write ----------------------
+        dma_channel_config cb = dma_channel_get_default_config(dma_b);
+        channel_config_set_read_increment(&cb, false);
+        channel_config_set_write_increment(&cb, false);
+        channel_config_set_transfer_data_size(&cb, DMA_SIZE_32);
+
+        // Write 1 word to A.AL1_TRANSFER_COUNT_TRIG (this sets count and re-starts A)
+        dma_channel_configure(
+            dma_b, &cb,
+            (void*)&dma_hw->ch[dma_a].al1_transfer_count_trig,
+            (const void*)&reload_count,
+            1, false
+        );
+
+        // Go!
+        dma_channel_start(dma_a);
         pio_sm_set_enabled(pio, sm, true);
 
+
         return 0;
     };
 
diff --git a/src/current/rp2350/RP2350PIOCurrentSense.h b/src/current/rp2350/RP2350PIOCurrentSense.h
@@ -3,6 +3,8 @@
 
 #include "common/base_classes/CurrentSense.h"
 #include "bu79100g_parallel3.pio.h"
+#include "hardware/dma.h"
+#include "hardware/sync.h"
 
 class RP2350PIOCurrentSense: public CurrentSense {
   public:
@@ -12,7 +14,21 @@ class RP2350PIOCurrentSense: public CurrentSense {
     int init() override;
 
     PhaseCurrent_s getPhaseCurrents() override;
-  protected:
+  
+    static constexpr uint32_t RING_WORDS    = 16;   // ring span (needs to be a power of two)
+    static constexpr uint32_t RING_BYTES = RING_WORDS * 4;
+
+    // Buffer base must be aligned to ring span for write-ring:
+    alignas(RING_BYTES) volatile uint32_t buff[RING_WORDS];
+
+    // Single word used by DMA B to rearm A:
+    alignas(4) volatile uint32_t reload_count = RING_WORDS;
+
+
+    int dma_a = -1; // PIO RX -> ring (streamer)
+    int dma_b = -1; // reloader 
+
+
     uint32_t max_adc_value; //!< maximum ADC value (e.g. 4096 for 12 bit ADC)
     int pinCSB;
     int pinSCK;
@@ -23,5 +39,5 @@ class RP2350PIOCurrentSense: public CurrentSense {
     int gain_a;
     int gain_b;
     int gain_c;
-
+  protected: //For debug, all public
 };
diff --git a/src/current/rp2350/bu79100g_parallel3.pio b/src/current/rp2350/bu79100g_parallel3.pio
@@ -5,7 +5,6 @@
 ; in_base:     D0..D2 (3 contiguous input pins)
 
 .side_set 1 opt            ; 1 sideset bit to drive SCK
-
 .wrap_target
     set pins, 1   side 1   ; CSB=1, SCK=1
     ; -------- wait external falling edge on absolute GPIO ----------
@@ -22,9 +21,15 @@ dummy_loop:
     set pins, 0
     ; -------- 16 real clocks, sample on SCK rising edge -----------
 read_loop:    
-        nop           side 1  ;DEBUG so we don't have to wait for autopush.
-        ;in  pins, 3   side 1          ; SCK=1, sample D2..D0 on rising edge
+        ;nop          side 1  ;DEBUG so we don't have to wait for autopush.
+        in  pins, 4   side 1          ; SCK=1, sample D2..D0 on rising edge  ;Note, Here I had to read 4 pins instead of 3. It seems that with 3, a bit is lost after the first push. Need to read the doc again
         jmp x--, read_loop side 0      ; SCK=0
     ; -------- finish conversion -----------------------------------
     set pins, 1   side 1               ; CSB=1, SCK=1
+    ; -------- Pad with 0 ------------------------------------------
+    ;set x, 0        ; Clear x
+    ;mov x, ~x 
+    ;in x, 16        ; Push 16 bits of 1 into ISR
+
+    ;push 
 .wrap
diff --git a/src/current/rp2350/bu79100g_parallel3.pio.h b/src/current/rp2350/bu79100g_parallel3.pio.h
@@ -13,7 +13,7 @@
 // ------------------ //
 
 #define bu79100g_parallel3_wrap_target 0
-#define bu79100g_parallel3_wrap 12
+#define bu79100g_parallel3_wrap 14
 #define bu79100g_parallel3_pio_version 1
 
 static const uint16_t bu79100g_parallel3_program_instructions[] = {
@@ -28,16 +28,18 @@ static const uint16_t bu79100g_parallel3_program_instructions[] = {
     0xf801, //  7: set    pins, 1         side 1
     0xf82f, //  8: set    x, 15           side 1
     0xe000, //  9: set    pins, 0
-    0xb842, // 10: nop                    side 1
+    0x5804, // 10: in     pins, 4         side 1
     0x104a, // 11: jmp    x--, 10         side 0
     0xf801, // 12: set    pins, 1         side 1
+    0xe020, // 13: set    x, 0
+    0xa029, // 14: mov    x, ~x
             //     .wrap
 };
 
 #if !PICO_NO_HARDWARE
 static const struct pio_program bu79100g_parallel3_program = {
     .instructions = bu79100g_parallel3_program_instructions,
-    .length = 13,
+    .length = 15,
     .origin = -1,
     .pio_version = bu79100g_parallel3_pio_version,
 #if PICO_PIO_VERSION > 0
