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AArch64: Remove deprecated AArch64MCExpr::Specifier
Remove unneeded uses and replace the rest with AArch64::Specifier.
1 parent 4024803 commit 7e67307

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8 files changed

+49
-63
lines changed

8 files changed

+49
-63
lines changed

‎llvm/lib/Target/AArch64/AArch64MCInstLower.cpp‎

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -263,10 +263,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandELF(const MachineOperand &MO,
263263
Expr = MCBinaryExpr::createAdd(
264264
Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
265265

266-
AArch64MCExpr::Specifier RefKind;
267-
RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags);
268-
Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx);
269-
266+
Expr = MCSpecifierExpr::create(Expr, RefFlags, Ctx);
270267
return MCOperand::createExpr(Expr);
271268
}
272269

@@ -317,10 +314,7 @@ MCOperand AArch64MCInstLower::lowerSymbolOperandCOFF(const MachineOperand &MO,
317314
Expr = MCBinaryExpr::createAdd(
318315
Expr, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx);
319316

320-
auto RefKind = static_cast<AArch64MCExpr::Specifier>(RefFlags);
321-
assert(RefKind != AArch64::S_INVALID && "Invalid relocation requested");
322-
Expr = MCSpecifierExpr::create(Expr, RefKind, Ctx);
323-
317+
Expr = MCSpecifierExpr::create(Expr, RefFlags, Ctx);
324318
return MCOperand::createExpr(Expr);
325319
}
326320

‎llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp‎

Lines changed: 21 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -340,9 +340,8 @@ class AArch64AsmParser : public MCTargetAsmParser {
340340
unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
341341
unsigned Kind) override;
342342

343-
static bool classifySymbolRef(const MCExpr *Expr,
344-
AArch64MCExpr::Specifier &ELFSpec,
345-
AArch64MCExpr::Specifier &DarwinSpec,
343+
static bool classifySymbolRef(const MCExpr *Expr, AArch64::Specifier &ELFSpec,
344+
AArch64::Specifier &DarwinSpec,
346345
int64_t &Addend);
347346
};
348347

@@ -891,8 +890,8 @@ class AArch64Operand : public MCParsedAsmOperand {
891890
}
892891

893892
bool isSymbolicUImm12Offset(const MCExpr *Expr) const {
894-
AArch64MCExpr::Specifier ELFSpec;
895-
AArch64MCExpr::Specifier DarwinSpec;
893+
AArch64::Specifier ELFSpec;
894+
AArch64::Specifier DarwinSpec;
896895
int64_t Addend;
897896
if (!AArch64AsmParser::classifySymbolRef(Expr, ELFSpec, DarwinSpec,
898897
Addend)) {
@@ -1007,8 +1006,8 @@ class AArch64Operand : public MCParsedAsmOperand {
10071006
Expr = getImm();
10081007
}
10091008

1010-
AArch64MCExpr::Specifier ELFSpec;
1011-
AArch64MCExpr::Specifier DarwinSpec;
1009+
AArch64::Specifier ELFSpec;
1010+
AArch64::Specifier DarwinSpec;
10121011
int64_t Addend;
10131012
if (AArch64AsmParser::classifySymbolRef(Expr, ELFSpec, DarwinSpec,
10141013
Addend)) {
@@ -1115,12 +1114,12 @@ class AArch64Operand : public MCParsedAsmOperand {
11151114
return (Val >= -((1<<(N-1)) << 2) && Val <= (((1<<(N-1))-1) << 2));
11161115
}
11171116

1118-
bool isMovWSymbol(ArrayRef<AArch64MCExpr::Specifier> AllowedModifiers) const {
1117+
bool isMovWSymbol(ArrayRef<AArch64::Specifier> AllowedModifiers) const {
11191118
if (!isImm())
11201119
return false;
11211120

1122-
AArch64MCExpr::Specifier ELFSpec;
1123-
AArch64MCExpr::Specifier DarwinSpec;
1121+
AArch64::Specifier ELFSpec;
1122+
AArch64::Specifier DarwinSpec;
11241123
int64_t Addend;
11251124
if (!AArch64AsmParser::classifySymbolRef(getImm(), ELFSpec, DarwinSpec,
11261125
Addend)) {
@@ -3293,8 +3292,8 @@ ParseStatus AArch64AsmParser::tryParseAdrpLabel(OperandVector &Operands) {
32933292
if (parseSymbolicImmVal(Expr))
32943293
return ParseStatus::Failure;
32953294

3296-
AArch64MCExpr::Specifier ELFSpec;
3297-
AArch64MCExpr::Specifier DarwinSpec;
3295+
AArch64::Specifier ELFSpec;
3296+
AArch64::Specifier DarwinSpec;
32983297
int64_t Addend;
32993298
if (classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) {
33003299
if (DarwinSpec == AArch64::S_None && ELFSpec == AArch64::S_INVALID) {
@@ -3345,8 +3344,8 @@ ParseStatus AArch64AsmParser::tryParseAdrLabel(OperandVector &Operands) {
33453344
if (parseSymbolicImmVal(Expr))
33463345
return ParseStatus::Failure;
33473346

3348-
AArch64MCExpr::Specifier ELFSpec;
3349-
AArch64MCExpr::Specifier DarwinSpec;
3347+
AArch64::Specifier ELFSpec;
3348+
AArch64::Specifier DarwinSpec;
33503349
int64_t Addend;
33513350
if (classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) {
33523351
if (DarwinSpec == AArch64::S_None && ELFSpec == AArch64::S_INVALID) {
@@ -4393,7 +4392,7 @@ bool AArch64AsmParser::parseRegister(OperandVector &Operands) {
43934392

43944393
bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) {
43954394
bool HasELFModifier = false;
4396-
AArch64MCExpr::Specifier RefKind;
4395+
AArch64::Specifier RefKind;
43974396

43984397
if (parseOptionalToken(AsmToken::Colon)) {
43994398
HasELFModifier = true;
@@ -4402,7 +4401,7 @@ bool AArch64AsmParser::parseSymbolicImmVal(const MCExpr *&ImmVal) {
44024401
return TokError("expect relocation specifier in operand after ':'");
44034402

44044403
std::string LowerCase = getTok().getIdentifier().lower();
4405-
RefKind = StringSwitch<AArch64MCExpr::Specifier>(LowerCase)
4404+
RefKind = StringSwitch<AArch64::Specifier>(LowerCase)
44064405
.Case("lo12", AArch64::S_LO12)
44074406
.Case("abs_g3", AArch64::S_ABS_G3)
44084407
.Case("abs_g2", AArch64::S_ABS_G2)
@@ -5836,8 +5835,8 @@ bool AArch64AsmParser::validateInstruction(MCInst &Inst, SMLoc &IDLoc,
58365835
// some slight duplication here.
58375836
if (Inst.getOperand(2).isExpr()) {
58385837
const MCExpr *Expr = Inst.getOperand(2).getExpr();
5839-
AArch64MCExpr::Specifier ELFSpec;
5840-
AArch64MCExpr::Specifier DarwinSpec;
5838+
AArch64::Specifier ELFSpec;
5839+
AArch64::Specifier DarwinSpec;
58415840
int64_t Addend;
58425841
if (classifySymbolRef(Expr, ELFSpec, DarwinSpec, Addend)) {
58435842

@@ -8270,8 +8269,8 @@ bool AArch64AsmParser::parseAuthExpr(const MCExpr *&Res, SMLoc &EndLoc) {
82708269
}
82718270

82728271
bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
8273-
AArch64MCExpr::Specifier &ELFSpec,
8274-
AArch64MCExpr::Specifier &DarwinSpec,
8272+
AArch64::Specifier &ELFSpec,
8273+
AArch64::Specifier &DarwinSpec,
82758274
int64_t &Addend) {
82768275
ELFSpec = AArch64::S_INVALID;
82778276
DarwinSpec = AArch64::S_None;
@@ -8285,7 +8284,7 @@ bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
82858284
const MCSymbolRefExpr *SE = dyn_cast<MCSymbolRefExpr>(Expr);
82868285
if (SE) {
82878286
// It's a simple symbol reference with no addend.
8288-
DarwinSpec = AArch64MCExpr::Specifier(SE->getKind());
8287+
DarwinSpec = AArch64::Specifier(SE->getKind());
82898288
return true;
82908289
}
82918290

@@ -8301,7 +8300,7 @@ bool AArch64AsmParser::classifySymbolRef(const MCExpr *Expr,
83018300
return false;
83028301

83038302
if (Res.getAddSym())
8304-
DarwinSpec = AArch64MCExpr::Specifier(Res.getSpecifier());
8303+
DarwinSpec = AArch64::Specifier(Res.getSpecifier());
83058304
Addend = Res.getConstant();
83068305

83078306
// It's some symbol reference + a constant addend, but really

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -219,8 +219,8 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
219219
Ctx.reportError(Fixup.getLoc(), "fixup must be 16-byte aligned");
220220
return Value >> 4;
221221
case AArch64::fixup_aarch64_movw: {
222-
AArch64MCExpr::Specifier RefKind =
223-
static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
222+
AArch64::Specifier RefKind =
223+
static_cast<AArch64::Specifier>(Target.getSpecifier());
224224
if (AArch64::getSymbolLoc(RefKind) != AArch64::S_ABS &&
225225
AArch64::getSymbolLoc(RefKind) != AArch64::S_SABS) {
226226
if (!RefKind) {
@@ -421,8 +421,8 @@ void AArch64AsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup,
421421
return;
422422

423423
if (Fixup.getTargetKind() == FK_Data_8 && TheTriple.isOSBinFormatELF()) {
424-
auto RefKind = static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
425-
AArch64MCExpr::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
424+
auto RefKind = static_cast<AArch64::Specifier>(Target.getSpecifier());
425+
AArch64::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
426426
if (SymLoc == AArch64::S_AUTH || SymLoc == AArch64::S_AUTHADDR) {
427427
const auto *Expr = dyn_cast<AArch64AuthMCExpr>(Fixup.getValue());
428428
if (!Expr) {
@@ -474,8 +474,8 @@ void AArch64AsmBackend::applyFixup(const MCFragment &, const MCFixup &Fixup,
474474

475475
// FIXME: getFixupKindInfo() and getFixupKindNumBytes() could be fixed to
476476
// handle this more cleanly. This may affect the output of -show-mc-encoding.
477-
AArch64MCExpr::Specifier RefKind =
478-
static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
477+
AArch64::Specifier RefKind =
478+
static_cast<AArch64::Specifier>(Target.getSpecifier());
479479
if (AArch64::getSymbolLoc(RefKind) == AArch64::S_SABS ||
480480
(!RefKind && Fixup.getTargetKind() == AArch64::fixup_aarch64_movw)) {
481481
// If the immediate is negative, generate MOVN else MOVZ.

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp‎

Lines changed: 11 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -39,8 +39,7 @@ class AArch64ELFObjectWriter : public MCELFObjectTargetWriter {
3939
unsigned getRelocType(const MCFixup &, const MCValue &,
4040
bool IsPCRel) const override;
4141
bool needsRelocateWithSymbol(const MCValue &, unsigned Type) const override;
42-
bool isNonILP32reloc(const MCFixup &Fixup,
43-
AArch64MCExpr::Specifier RefKind) const;
42+
bool isNonILP32reloc(const MCFixup &Fixup, AArch64::Specifier RefKind) const;
4443

4544
bool IsILP32;
4645
};
@@ -56,8 +55,8 @@ AArch64ELFObjectWriter::AArch64ELFObjectWriter(uint8_t OSABI, bool IsILP32)
5655
IsILP32 ? ELF::R_AARCH64_P32_##rtype : ELF::R_AARCH64_##rtype
5756

5857
// assumes IsILP32 is true
59-
bool AArch64ELFObjectWriter::isNonILP32reloc(
60-
const MCFixup &Fixup, AArch64MCExpr::Specifier RefKind) const {
58+
bool AArch64ELFObjectWriter::isNonILP32reloc(const MCFixup &Fixup,
59+
AArch64::Specifier RefKind) const {
6160
if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw)
6261
return false;
6362
switch (RefKind) {
@@ -86,9 +85,9 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
8685
const MCValue &Target,
8786
bool IsPCRel) const {
8887
unsigned Kind = Fixup.getTargetKind();
89-
AArch64MCExpr::Specifier RefKind =
90-
static_cast<AArch64MCExpr::Specifier>(Target.getSpecifier());
91-
AArch64MCExpr::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
88+
AArch64::Specifier RefKind =
89+
static_cast<AArch64::Specifier>(Target.getSpecifier());
90+
AArch64::Specifier SymLoc = AArch64::getSymbolLoc(RefKind);
9291
bool IsNC = AArch64::isNotChecked(RefKind);
9392

9493
switch (SymLoc) {
@@ -117,9 +116,8 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
117116
case FK_Data_2:
118117
return R_CLS(PREL16);
119118
case FK_Data_4: {
120-
return AArch64MCExpr::Specifier(Target.getSpecifier()) == AArch64::S_PLT
121-
? R_CLS(PLT32)
122-
: R_CLS(PREL32);
119+
return Target.getSpecifier() == AArch64::S_PLT ? R_CLS(PLT32)
120+
: R_CLS(PREL32);
123121
}
124122
case FK_Data_8:
125123
if (IsILP32) {
@@ -221,8 +219,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
221219
case FK_Data_2:
222220
return R_CLS(ABS16);
223221
case FK_Data_4:
224-
return (!IsILP32 && AArch64MCExpr::Specifier(Target.getSpecifier()) ==
225-
AArch64::S_GOTPCREL)
222+
return (!IsILP32 && Target.getSpecifier() == AArch64::S_GOTPCREL)
226223
? ELF::R_AARCH64_GOTPCREL32
227224
: R_CLS(ABS32);
228225
case FK_Data_8: {
@@ -352,7 +349,7 @@ unsigned AArch64ELFObjectWriter::getRelocType(const MCFixup &Fixup,
352349
if (SymLoc == AArch64::S_ABS && IsNC)
353350
return R_CLS(LDST64_ABS_LO12_NC);
354351
if ((SymLoc == AArch64::S_GOT || SymLoc == AArch64::S_GOT_AUTH) && IsNC) {
355-
AArch64MCExpr::Specifier AddressLoc = AArch64::getAddressFrag(RefKind);
352+
AArch64::Specifier AddressLoc = AArch64::getAddressFrag(RefKind);
356353
bool IsAuth = (SymLoc == AArch64::S_GOT_AUTH);
357354
if (!IsILP32) {
358355
if (AddressLoc == AArch64::S_LO15)
@@ -497,7 +494,7 @@ bool AArch64ELFObjectWriter::needsRelocateWithSymbol(const MCValue &Val,
497494
if ((Val.getSpecifier() & AArch64::S_GOT) == AArch64::S_GOT)
498495
return true;
499496
return is_contained({AArch64::S_GOTPCREL, AArch64::S_PLT},
500-
AArch64MCExpr::Specifier(Val.getSpecifier()));
497+
Val.getSpecifier());
501498
}
502499

503500
std::unique_ptr<MCObjectTargetWriter>

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -309,7 +309,7 @@ AArch64MCCodeEmitter::getAddSubImmOpValue(const MCInst &MI, unsigned OpIdx,
309309
// Set the shift bit of the add instruction for relocation types
310310
// R_AARCH64_TLSLE_ADD_TPREL_HI12 and R_AARCH64_TLSLD_ADD_DTPREL_HI12.
311311
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
312-
AArch64MCExpr::Specifier RefKind = A64E->getSpecifier();
312+
AArch64::Specifier RefKind = A64E->getSpecifier();
313313
if (RefKind == AArch64::S_TPREL_HI12 || RefKind == AArch64::S_DTPREL_HI12 ||
314314
RefKind == AArch64::S_SECREL_HI12)
315315
ShiftVal = 12;

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCExpr.h‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -21,9 +21,6 @@
2121

2222
namespace llvm {
2323

24-
namespace AArch64MCExpr {
25-
using Specifier = uint16_t;
26-
} // namespace AArch64MCExpr
2724

2825
} // end namespace llvm
2926

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64MachObjectWriter.cpp‎

Lines changed: 5 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -34,8 +34,8 @@ namespace {
3434

3535
class AArch64MachObjectWriter : public MCMachObjectTargetWriter {
3636
bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType,
37-
AArch64MCExpr::Specifier Spec,
38-
unsigned &Log2Size, const MCAssembler &Asm);
37+
AArch64::Specifier Spec, unsigned &Log2Size,
38+
const MCAssembler &Asm);
3939

4040
public:
4141
AArch64MachObjectWriter(uint32_t CPUType, uint32_t CPUSubtype, bool IsILP32)
@@ -49,7 +49,7 @@ class AArch64MachObjectWriter : public MCMachObjectTargetWriter {
4949
} // end anonymous namespace
5050

5151
bool AArch64MachObjectWriter::getAArch64FixupKindMachOInfo(
52-
const MCFixup &Fixup, unsigned &RelocType, AArch64MCExpr::Specifier Spec,
52+
const MCFixup &Fixup, unsigned &RelocType, AArch64::Specifier Spec,
5353
unsigned &Log2Size, const MCAssembler &Asm) {
5454
RelocType = unsigned(MachO::ARM64_RELOC_UNSIGNED);
5555
Log2Size = ~0U;
@@ -189,9 +189,8 @@ void AArch64MachObjectWriter::recordRelocation(
189189
return;
190190
}
191191

192-
if (!getAArch64FixupKindMachOInfo(
193-
Fixup, Type, AArch64MCExpr::Specifier(Target.getSpecifier()),
194-
Log2Size, Asm)) {
192+
if (!getAArch64FixupKindMachOInfo(Fixup, Type, Target.getSpecifier(),
193+
Log2Size, Asm)) {
195194
reportError(Fixup.getLoc(), "unknown AArch64 fixup kind!");
196195
return;
197196
}

‎llvm/lib/Target/AArch64/MCTargetDesc/AArch64WinCOFFObjectWriter.cpp‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -65,7 +65,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
6565
const MCExpr *Expr = Fixup.getValue();
6666

6767
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
68-
AArch64MCExpr::Specifier Spec = A64E->getSpecifier();
68+
AArch64::Specifier Spec = A64E->getSpecifier();
6969
switch (AArch64::getSymbolLoc(Spec)) {
7070
case AArch64::S_ABS:
7171
case AArch64::S_SECREL:
@@ -117,7 +117,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
117117

118118
case AArch64::fixup_aarch64_add_imm12:
119119
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
120-
AArch64MCExpr::Specifier Spec = A64E->getSpecifier();
120+
AArch64::Specifier Spec = A64E->getSpecifier();
121121
if (Spec == AArch64::S_SECREL_LO12)
122122
return COFF::IMAGE_REL_ARM64_SECREL_LOW12A;
123123
if (Spec == AArch64::S_SECREL_HI12)
@@ -131,7 +131,7 @@ unsigned AArch64WinCOFFObjectWriter::getRelocType(
131131
case AArch64::fixup_aarch64_ldst_imm12_scale8:
132132
case AArch64::fixup_aarch64_ldst_imm12_scale16:
133133
if (auto *A64E = dyn_cast<MCSpecifierExpr>(Expr)) {
134-
AArch64MCExpr::Specifier Spec = A64E->getSpecifier();
134+
AArch64::Specifier Spec = A64E->getSpecifier();
135135
if (Spec == AArch64::S_SECREL_LO12)
136136
return COFF::IMAGE_REL_ARM64_SECREL_LOW12L;
137137
}

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