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Add home photoresist etching PCB template
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‎.gitignore‎

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.DS_Store
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**/*-backups/*
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fp-info-cache
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*.kicad_prl
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fp-info-cache

‎README.md‎

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# KiCad Template Collection
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A collection of KiCad PCB templates optimized for different PCB manufacturing services. Currently includes templates for JLCPCB.
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A collection of KiCad PCB templates optimized for different PCB manufacturing services and methods. Includes templates for commercial fabrication (JLCPCB) and home PCB manufacturing.
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Templates come with design rules and stackups already configured to meet manufacturer specifications for optimal price-to-quality ratio.
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Templates come with design rules and stackups already configured to meet manufacturer specifications or home fabrication capabilities for optimal price-to-quality ratio and manufacturing success.
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## Installation
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https://raw.githubusercontent.com/sivakov512/kicad-pcm-index/master/repository.json
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```
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5. Click **OK**
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6. Find "Sivakov KiCad template collection" in the list and click **Install**
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5. Find "Sivakov KiCad template collection" in the list and click **Install**
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7. Restart KiCad to ensure all templates are properly loaded
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To create a project using these templates after installation:
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## Available Templates
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| Template | Description | Manufacturer |
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|----------|-------------|--------------|
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| **JLCPCB Low-Cost Template** | PCB template with minimum design rules for cost-effective fabrication at JLCPCB | JLCPCB |
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| Template | Description | Manufacturing Method |
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|----------|-------------|---------------------|
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| **JLCPCB Low-Cost Template** | PCB template with minimum design rules for cost-effective fabrication at JLCPCB | Commercial (JLCPCB) |
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| **Home Etch Photoresist Template** | PCB template optimized for home fabrication using photoresist etching methods | DIY/Home Manufacturing |
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![Template Selection](./docs/template_selector.png)
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‎metadata.json‎

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{
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"$schema": "https://go.kicad.org/pcm/schemas/v1",
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"name": "Sivakov KiCad template collection",
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"description": "KiCad templates optimized for PCB manufacturing services.",
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"description_full": "A collection of KiCad PCB templates optimized for PCB manufacturing. Templates include preconfigured design rules and stackups to meet specific manufacturing requirements and specifications.",
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"description": "KiCad templates optimized for PCB manufacturing services and home fabrication.",
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"description_full": "A collection of KiCad PCB templates optimized for PCB manufacturing services and home fabrication methods. Templates include preconfigured design rules and stackups to meet specific manufacturing requirements, commercial specifications, and DIY capabilities.",
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"identifier": "com.github.sivakov512.kicad-templates",
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"type": "library",
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"author": {
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"resources": {
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"homepage": "https://github.com/sivakov512/kicad-templates"
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},
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"tags": ["jlcpcb", "library", "pcb", "template"],
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"tags": [
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"jlcpcb",
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"library",
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"pcb",
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"template",
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"diy",
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"home-etch",
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"photoresist"
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],
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"versions": [
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{
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"version": "1.0.0",

‎templates/home-etch-photoresist/README.md‎

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# Home Etch Photoresist Template
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A KiCad template optimized for home PCB fabrication using photoresist etching methods, configured with design rules suitable for DIY PCB manufacturing with standard photoresist processes and ferric chloride etching.
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The template is preconfigured as a 2-layer board with constraints appropriate for home etching capabilities, ensuring reliable results with common DIY equipment and materials.
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---
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## Key Features
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* ✅ Optimized for **home photoresist etching** with UV exposure and chemical etching
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* ✅ **2-layer stackup** (1.525 mm total thickness) suitable for standard FR4 blanks
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* ✅ Design rules set for **reliable home fabrication** with standard equipment
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* ✅ Track widths and clearances tuned for **photoresist resolution limits**
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* ✅ Via sizes compatible with **manual drilling** or basic CNC equipment
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* ✅ Conservative constraints to ensure **high success rate** in home workshop
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---
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## Stackup (2 Layers)
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| Layer | Material | Thickness |
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| --------- | -------- | --------- |
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| Top Cu | Cu | 0.035 mm |
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| Core | FR4 | 1.435 mm |
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| Bottom Cu | Cu | 0.035 mm |
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| Mask | - | 0.01 mm |
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**Total thickness**: 1.525 mm (standard single-sided FR4 blank thickness)
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---
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## Design Rules → Constraints
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| Parameter | Value | Notes |
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| --------------------------- | ------- | ---------------------------------------- |
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| Minimum clearance | 0.2 mm | Safe for photoresist resolution |
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| Minimum track width | 0.25 mm | Reliable with standard UV exposure |
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| Minimum connection width | 0.25 mm | Ensures good electrical connection |
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| Minimum annular width | 0.15 mm | Adequate for manual drilling tolerance |
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| Minimum via diameter | 0.6 mm | Suitable for 0.3 mm drill bits |
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| Copper to hole clearance | 0.3 mm | Accounts for drilling precision |
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| Copper to edge clearance | 0.5 mm | Safe margin for cutting/routing |
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| Minimum through hole | 0.6 mm | Standard drill bit availability |
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| Hole to hole clearance | 0.3 mm | Prevents drill breakage |
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| Min text height | 0.8 mm | Readable after etching process |
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| Min text thickness | 0.08 mm | Maintains legibility |
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---
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## Net Classes → `Default`
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| Property | Value |
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| -------------- | ------- |
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| Clearance | 0.2 mm |
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| Track Width | 0.25 mm |
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| Via Size | 0.6 mm |
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| Via Hole | 0.3 mm |
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| DiffPair Width | 0.2 mm |
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| DiffPair Gap | 0.25 mm |
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---
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## Manufacturing Process Compatibility
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* **Photoresist**: Optimized for positive photoresist film or spray application
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* **UV Exposure**: Track/clearance sizes suitable for standard UV LED exposure boxes
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* **Etching**: Compatible with ferric chloride, ammonium persulfate, or muriatic acid + hydrogen peroxide
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* **Drilling**: Via and hole sizes match common PCB drill bit sets (0.3-3.0 mm)
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* **Surface Finish**: Template assumes bare copper (no plating required)
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---
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## Notes
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* No solder mask or silkscreen layers configured — add if needed for your process
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* Conservative design rules prioritize manufacturing success over density
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* Test your specific photoresist/exposure setup with simple test patterns first
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* Consider tinning traces after etching to prevent oxidation

‎templates/home-etch-photoresist/home-etch-photoresist.kicad_pcb‎

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(kicad_pcb
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(version 20241229)
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(generator "pcbnew")
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(generator_version "9.0")
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(general
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(thickness 1.525)
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(legacy_teardrops no)
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)
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(paper "A4")
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(layers
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(0 "F.Cu" signal)
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(2 "B.Cu" signal)
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(9 "F.Adhes" user "F.Adhesive")
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(11 "B.Adhes" user "B.Adhesive")
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(13 "F.Paste" user)
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(15 "B.Paste" user)
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(1 "F.Mask" user)
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(3 "B.Mask" user)
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(17 "Dwgs.User" user "User.Drawings")
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(19 "Cmts.User" user "User.Comments")
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(21 "Eco1.User" user "User.Eco1")
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(23 "Eco2.User" user "User.Eco2")
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(25 "Edge.Cuts" user)
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(27 "Margin" user)
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(31 "F.CrtYd" user "F.Courtyard")
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(29 "B.CrtYd" user "B.Courtyard")
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(35 "F.Fab" user)
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(33 "B.Fab" user)
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(39 "User.1" user)
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(41 "User.2" user)
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(43 "User.3" user)
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(45 "User.4" user)
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)
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(setup
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(stackup
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(layer "F.Paste"
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(type "Top Solder Paste")
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)
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(layer "F.Mask"
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(type "Top Solder Mask")
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(thickness 0.01)
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)
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(layer "F.Cu"
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(type "copper")
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(thickness 0.035)
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)
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(layer "dielectric 1"
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(type "core")
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(thickness 1.435)
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(material "FR4")
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(epsilon_r 4.5)
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(loss_tangent 0.02)
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)
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(layer "B.Cu"
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(type "copper")
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(thickness 0.035)
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)
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(layer "B.Mask"
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(type "Bottom Solder Mask")
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(thickness 0.01)
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)
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(layer "B.Paste"
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(type "Bottom Solder Paste")
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)
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(copper_finish "None")
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(dielectric_constraints no)
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)
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(pad_to_mask_clearance 0)
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(allow_soldermask_bridges_in_footprints no)
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(tenting front back)
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(pcbplotparams
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(layerselection 0x00000000_00000000_55555555_5755f5ff)
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(plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000)
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(disableapertmacros no)
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(usegerberextensions no)
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(usegerberattributes yes)
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(usegerberadvancedattributes yes)
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(creategerberjobfile yes)
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(dashed_line_dash_ratio 12.000000)
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(dashed_line_gap_ratio 3.000000)
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(svgprecision 4)
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(plotframeref no)
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(mode 1)
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(useauxorigin no)
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(hpglpennumber 1)
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(hpglpenspeed 20)
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(hpglpendiameter 15.000000)
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(pdf_front_fp_property_popups yes)
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(pdf_back_fp_property_popups yes)
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(pdf_metadata yes)
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(pdf_single_document no)
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(dxfpolygonmode yes)
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(dxfimperialunits yes)
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(dxfusepcbnewfont yes)
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(psnegative no)
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(psa4output no)
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(plot_black_and_white yes)
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(sketchpadsonfab no)
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(plotpadnumbers no)
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(hidednponfab no)
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(sketchdnponfab yes)
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(crossoutdnponfab yes)
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(subtractmaskfromsilk no)
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(outputformat 1)
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(mirror no)
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(drillshape 1)
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(scaleselection 1)
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(outputdirectory "")
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)
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)
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(net 0 "")
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(embedded_fonts no)
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)

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